]> git.proxmox.com Git - mirror_ubuntu-kernels.git/commitdiff
wifi: rtw89: 8851b: rfk: add RCK
authorPing-Ke Shih <pkshih@realtek.com>
Mon, 24 Apr 2023 06:52:40 +0000 (14:52 +0800)
committerKalle Valo <kvalo@kernel.org>
Fri, 5 May 2023 12:01:02 +0000 (15:01 +0300)
RCK is synchronize RC calibration. Driver triggers this calibration and
sets the result to register. This calibration is needed once when interface
is going to up.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20230424065242.17477-4-pkshih@realtek.com
drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c
drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.h

index 471ed1a6347651ddabaaadf82132de27ebaefd1c..7f454f68d08d8b9a51718bbd999404819e835460 100644 (file)
@@ -17,6 +17,41 @@ static u8 _kpath(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx)
        return RF_A;
 }
 
+static void _rck(struct rtw89_dev *rtwdev, enum rtw89_rf_path path)
+{
+       u32 rf_reg5;
+       u32 rck_val;
+       u32 val;
+       int ret;
+
+       rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] ====== S%d RCK ======\n", path);
+
+       rf_reg5 = rtw89_read_rf(rtwdev, path, RR_RSV1, RFREG_MASK);
+
+       rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0);
+       rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX);
+
+       rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] RF0x00 = 0x%05x\n",
+                   rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK));
+
+       /* RCK trigger */
+       rtw89_write_rf(rtwdev, path, RR_RCKC, RFREG_MASK, 0x00240);
+
+       ret = read_poll_timeout_atomic(rtw89_read_rf, val, val, 2, 30,
+                                      false, rtwdev, path, RR_RCKS, BIT(3));
+
+       rck_val = rtw89_read_rf(rtwdev, path, RR_RCKC, RR_RCKC_CA);
+
+       rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] rck_val = 0x%x, ret = %d\n",
+                   rck_val, ret);
+
+       rtw89_write_rf(rtwdev, path, RR_RCKC, RFREG_MASK, rck_val);
+       rtw89_write_rf(rtwdev, path, RR_RSV1, RFREG_MASK, rf_reg5);
+
+       rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] RF 0x1b = 0x%x\n",
+                   rtw89_read_rf(rtwdev, path, RR_RCKC, RFREG_MASK));
+}
+
 void rtw8851b_aack(struct rtw89_dev *rtwdev)
 {
        u32 tmp05, ib[4];
@@ -59,6 +94,11 @@ void rtw8851b_aack(struct rtw89_dev *rtwdev)
        rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, RFREG_MASK, tmp05);
 }
 
+void rtw8851b_rck(struct rtw89_dev *rtwdev)
+{
+       _rck(rtwdev, RF_PATH_A);
+}
+
 static void _bw_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path,
                        enum rtw89_bandwidth bw, bool dav)
 {
index cd38d9ed1ff39e4f2d9d89774776e622ff53529c..9f67a8c3b9d906c628763da837fcc1967d3c3f4c 100644 (file)
@@ -8,6 +8,7 @@
 #include "core.h"
 
 void rtw8851b_aack(struct rtw89_dev *rtwdev);
+void rtw8851b_rck(struct rtw89_dev *rtwdev);
 void rtw8851b_set_channel_rf(struct rtw89_dev *rtwdev,
                             const struct rtw89_chan *chan,
                             enum rtw89_phy_idx phy_idx);