net/mlx5: Add misc5 flow table match parameters

BugLink: https://bugs.launchpad.net/bugs/1966194
Add support for misc5 match parameter as per HW spec, this will allow
matching on tunnel_header fields.

Signed-off-by: Muhammad Sammar <muhammads@nvidia.com>
Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
(cherry picked from commit 0f2a6c3b9219bdf497750258cd2ad513f0056b42)
Signed-off-by: dann frazier <dann.frazier@canonical.com>
Acked-by: Tim Gardner <tim.gardner@canonical.com>
Acked-by: Paolo Pisati <paolo.pisati@canonical.com>

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fs_core.h b/drivers/net/ethernet/mellanox/mlx5/core/fs_core.h
index 98240badc342cfe1ea87e30210ef762e1473a7d6..786b0e4a0bad71586c8515c6958c6e2b5814cce4 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/fs_core.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/fs_core.h
@@ -196,7 +196,7 @@ struct mlx5_ft_underlay_qp {
        u32 qpn;
 };
 
-#define MLX5_FTE_MATCH_PARAM_RESERVED  reserved_at_c00
+#define MLX5_FTE_MATCH_PARAM_RESERVED  reserved_at_e00
 /* Calculate the fte_match_param length and without the reserved length.
  * Make sure the reserved field is the last.
  */

diff --git a/include/linux/mlx5/device.h b/include/linux/mlx5/device.h
index 66eaf0aa7f698bf5e753578730e2a4fc65336a4e..0df6e2dd34e5eb8d9e1c15f01cf2d2f8b2eddb48 100644 (file)
--- a/include/linux/mlx5/device.h
+++ b/include/linux/mlx5/device.h
@@ -1099,6 +1099,7 @@ enum {
        MLX5_MATCH_MISC_PARAMETERS_2    = 1 << 3,
        MLX5_MATCH_MISC_PARAMETERS_3    = 1 << 4,
        MLX5_MATCH_MISC_PARAMETERS_4    = 1 << 5,
+       MLX5_MATCH_MISC_PARAMETERS_5    = 1 << 6,
 };
 
 enum {

diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index ccb9fc293c352d459234ff702c27235332caa782..dc86d5de37725fad4a4006a5c07c9e60966026da 100644 (file)
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -661,6 +661,26 @@ struct mlx5_ifc_fte_match_set_misc4_bits {
        u8         reserved_at_100[0x100];
 };
 
+struct mlx5_ifc_fte_match_set_misc5_bits {
+       u8         macsec_tag_0[0x20];
+
+       u8         macsec_tag_1[0x20];
+
+       u8         macsec_tag_2[0x20];
+
+       u8         macsec_tag_3[0x20];
+
+       u8         tunnel_header_0[0x20];
+
+       u8         tunnel_header_1[0x20];
+
+       u8         tunnel_header_2[0x20];
+
+       u8         tunnel_header_3[0x20];
+
+       u8         reserved_at_100[0x100];
+};
+
 struct mlx5_ifc_cmd_pas_bits {
        u8         pa_h[0x20];
 
@@ -1807,7 +1827,9 @@ struct mlx5_ifc_fte_match_param_bits {
 
        struct mlx5_ifc_fte_match_set_misc4_bits misc_parameters_4;
 
-       u8         reserved_at_c00[0x400];
+       struct mlx5_ifc_fte_match_set_misc5_bits misc_parameters_5;
+
+       u8         reserved_at_e00[0x200];
 };
 
 enum {
@@ -5628,6 +5650,7 @@ enum {
        MLX5_QUERY_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS_2 = 0x3,
        MLX5_QUERY_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS_3 = 0x4,
        MLX5_QUERY_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS_4 = 0x5,
+       MLX5_QUERY_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS_5 = 0x6,
 };
 
 struct mlx5_ifc_query_flow_group_out_bits {

diff --git a/include/uapi/rdma/mlx5_user_ioctl_cmds.h b/include/uapi/rdma/mlx5_user_ioctl_cmds.h
index ca2372864b70e961be3ac538597390d768a74db9..e539c84d63f1a08d7524c4b93f26e3e9ebb638f8 100644 (file)
--- a/include/uapi/rdma/mlx5_user_ioctl_cmds.h
+++ b/include/uapi/rdma/mlx5_user_ioctl_cmds.h
@@ -252,7 +252,7 @@ enum mlx5_ib_device_query_context_attrs {
        MLX5_IB_ATTR_QUERY_CONTEXT_RESP_UCTX = (1U << UVERBS_ID_NS_SHIFT),
 };
 
-#define MLX5_IB_DW_MATCH_PARAM 0x90
+#define MLX5_IB_DW_MATCH_PARAM 0xA0
 
 struct mlx5_ib_match_params {
        __u32   match_params[MLX5_IB_DW_MATCH_PARAM];