WIP: dt: add support for gpu on msm8916/apq8016

diff --git a/arch/arm64/boot/dts/qcom/msm8916-mdss.dtsi b/arch/arm64/boot/dts/qcom/msm8916-mdss.dtsi
index 25b609e69240517a0d216ed9737b13fa3504517c..95d3d337ae48bb6f0ac3001ff86b0419dde4f7d0 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8916-mdss.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-mdss.dtsi
@@ -11,6 +11,40 @@
  */
 
 &soc {
+       gpu: qcom,adreno-3xx@01c00000 {
+               compatible = "qcom,adreno-3xx";
+               #stream-id-cells = <16>;
+               reg = <0x01c00000 0x20000>;
+               reg-names = "kgsl_3d0_reg_memory";
+               interrupts = <0 33 0>;
+               interrupt-names = "kgsl_3d0_irq";
+               clock-names =
+                   "core_clk",
+                   "iface_clk",
+                   "mem_clk",
+                   "mem_iface_clk",
+                   "alt_mem_iface_clk",
+                   "gfx3d_clk_src";
+               clocks =
+                   <&gcc GCC_OXILI_GFX3D_CLK>,
+                   <&gcc GCC_OXILI_AHB_CLK>,
+                   <&gcc GCC_OXILI_GMEM_CLK>,
+                   <&gcc GCC_BIMC_GFX_CLK>,
+                   <&gcc GCC_BIMC_GPU_CLK>,
+                   <&gcc GFX3D_CLK_SRC>;
+               power-domains = <&gcc OXILI_GDSC>;
+               qcom,chipid = <0x03000600>;
+               qcom,gpu-pwrlevels {
+                       compatible = "qcom,gpu-pwrlevels";
+                       qcom,gpu-pwrlevel@0 {
+                               qcom,gpu-freq = <400000000>;
+                       };
+                       qcom,gpu-pwrlevel@1 {
+                               qcom,gpu-freq = <19200000>;
+                       };
+               };
+       };
+
        mdss_mdp: qcom,mdss_mdp@1a00000 {
                compatible = "qcom,mdss_mdp";
                reg = <0x1a00000 0x90000>,
@@ -24,6 +58,7 @@
                power-domains = <&gcc MDSS_GDSC>;
 
                connectors = <&mdss_dsi0>;
+               gpus = <&gpu>;
 
                clocks = <&gcc GCC_MDSS_AHB_CLK>,
                         <&gcc GCC_MDSS_AXI_CLK>,