Merge tag 'iio-fixes-for-4.14a' of git://git.kernel.org/pub/scm/linux/kernel/git...

Jonathan writes:

First round of IIO fixes for the 4.14 cycle

Note this includes fixes from recent merge window.  As such the tree
is based on top of a prior staging/staging-next tree.

* iio core
  - return and error for a failed read_reg debugfs call rather than
    eating the error.
* ad7192
  - Use the dedicated reset function in the ad_sigma_delta library
    instead of an spi transfer with the data on the stack which
    could cause problems with DMA.
* ad7793
  - Implement a dedicate reset function in the ad_sigma_delta library
    and use it to correctly reset this part.
* bme280
  - ctrl_reg write must occur after any register writes
  for updates to take effect.
* mcp320x
  - negative voltage readout was broken.
  - Fix an oops on module unload due to spi_set_drvdata not being called
    in probe.
* st_magn
  - Fix the data ready line configuration for the lis3mdl. It is not
    configurable so the st_magn core was assuming it didn't exist
    and so wasn't consuming interrupts resulting in an unhandled
    interrupt.
* stm32-adc
  - off by one error on max channels checking.
* stm32-timer
  - preset should not be buffered - reorganising register writes avoids
  this.
  - fix a corner case in which write preset goes wrong when a timer is
  used first as a trigger then as a counter with preset. Odd case but
  you never know.
* ti-ads1015
  - Fix setting of comparator polarity by fixing bitfield definition.
* twl4030
  - Error path handling fix to cleanup in event of regulator
    registration failure.
  - Disable the vusb3v1 regulator correctly in error handling
  - Don't paper over a regulator enable failure.

diff --combined drivers/iio/adc/stm32-adc.c
index e3c15f88075f7beb37b290e0a7d89bcc5bcd35d1,e93244bc3edd85d060559e410312eaffc08e5ab3..4df32cf1650e7c7f58f680026610478857269a35
--- 1/drivers/iio/adc/stm32-adc.c
--- 2/drivers/iio/adc/stm32-adc.c
+++ b/drivers/iio/adc/stm32-adc.c
@@@ -25,7 -25,6 +25,7 @@@
  #include <linux/dmaengine.h>
  #include <linux/iio/iio.h>
  #include <linux/iio/buffer.h>
 +#include <linux/iio/timer/stm32-lptim-trigger.h>
  #include <linux/iio/timer/stm32-timer-trigger.h>
  #include <linux/iio/trigger.h>
  #include <linux/iio/trigger_consumer.h>
@@@ -186,11 -185,6 +186,11 @@@ enum stm32_adc_extsel 
        STM32_EXT13,
        STM32_EXT14,
        STM32_EXT15,
 +      STM32_EXT16,
 +      STM32_EXT17,
 +      STM32_EXT18,
 +      STM32_EXT19,
 +      STM32_EXT20,
  };
  
  /**
@@@ -532,9 -526,6 +532,9 @@@ static struct stm32_adc_trig_info stm32
        { TIM4_TRGO, STM32_EXT12 },
        { TIM6_TRGO, STM32_EXT13 },
        { TIM3_CH4, STM32_EXT15 },
 +      { LPTIM1_OUT, STM32_EXT18 },
 +      { LPTIM2_OUT, STM32_EXT19 },
 +      { LPTIM3_OUT, STM32_EXT20 },
        {},
  };
  
@@@ -1091,8 -1082,7 +1091,8 @@@ static int stm32_adc_get_trig_extsel(st
                 * Checking both stm32 timer trigger type and trig name
                 * should be safe against arbitrary trigger names.
                 */
 -              if (is_stm32_timer_trigger(trig) &&
 +              if ((is_stm32_timer_trigger(trig) ||
 +                   is_stm32_lptim_trigger(trig)) &&
                    !strcmp(adc->cfg->trigs[i].name, trig->name)) {
                        return adc->cfg->trigs[i].extsel;
                }
@@@ -1666,7 -1656,7 +1666,7 @@@ static int stm32_adc_chan_of_init(struc
  
        num_channels = of_property_count_u32_elems(node, "st,adc-channels");
        if (num_channels < 0 ||
-           num_channels >= adc_info->max_channels) {
+           num_channels > adc_info->max_channels) {
                dev_err(&indio_dev->dev, "Bad st,adc-channels?\n");
                return num_channels < 0 ? num_channels : -EINVAL;
        }
@@@ -1774,7 -1764,7 +1774,7 @@@ static int stm32_adc_probe(struct platf
        indio_dev->dev.parent = &pdev->dev;
        indio_dev->dev.of_node = pdev->dev.of_node;
        indio_dev->info = &stm32_adc_iio_info;
 -      indio_dev->modes = INDIO_DIRECT_MODE;
 +      indio_dev->modes = INDIO_DIRECT_MODE | INDIO_HARDWARE_TRIGGERED;
  
        platform_set_drvdata(pdev, adc);
  

diff --combined drivers/iio/adc/twl4030-madc.c
index 1edd99f0c5e55a367772ab85b01e8a64cf399b54,28df096e84ec83e725729236d4dd9aa50aea90c4..e3cfb91bffc61122d56dc44b2ccd793afcd73800
--- 1/drivers/iio/adc/twl4030-madc.c
--- 2/drivers/iio/adc/twl4030-madc.c
+++ b/drivers/iio/adc/twl4030-madc.c
@@@ -35,7 -35,7 +35,7 @@@
  #include <linux/delay.h>
  #include <linux/platform_device.h>
  #include <linux/slab.h>
 -#include <linux/i2c/twl.h>
 +#include <linux/mfd/twl.h>
  #include <linux/module.h>
  #include <linux/stddef.h>
  #include <linux/mutex.h>
@@@ -887,21 -887,27 +887,27 @@@ static int twl4030_madc_probe(struct pl
  
        /* Enable 3v1 bias regulator for MADC[3:6] */
        madc->usb3v1 = devm_regulator_get(madc->dev, "vusb3v1");
-       if (IS_ERR(madc->usb3v1))
-               return -ENODEV;
+       if (IS_ERR(madc->usb3v1)) {
+               ret = -ENODEV;
+               goto err_i2c;
+       }
  
        ret = regulator_enable(madc->usb3v1);
-       if (ret)
+       if (ret) {
                dev_err(madc->dev, "could not enable 3v1 bias regulator\n");
+               goto err_i2c;
+       }
  
        ret = iio_device_register(iio_dev);
        if (ret) {
                dev_err(&pdev->dev, "could not register iio device\n");
-               goto err_i2c;
+               goto err_usb3v1;
        }
  
        return 0;
  
+ err_usb3v1:
+       regulator_disable(madc->usb3v1);
  err_i2c:
        twl4030_madc_set_current_generator(madc, 0, 0);
  err_current_generator:

diff --combined drivers/iio/magnetometer/st_magn_core.c
index e68368b5b2a38eed3ec722cc4a6e342401767ea0,2e36d746f5bce94384d29d24ac579bd6b0a7a6f2..08aafba4481c66345b7ef770b3e44ce8b464f843
--- 1/drivers/iio/magnetometer/st_magn_core.c
--- 2/drivers/iio/magnetometer/st_magn_core.c
+++ b/drivers/iio/magnetometer/st_magn_core.c
@@@ -315,6 -315,10 +315,10 @@@ static const struct st_sensor_settings 
                                },
                        },
                },
+               .drdy_irq = {
+                       /* drdy line is routed drdy pin */
+                       .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR,
+               },
                .multi_read_bit = true,
                .bootime = 2,
        },
@@@ -357,7 -361,9 +361,7 @@@
                .drdy_irq = {
                        .addr = 0x62,
                        .mask_int1 = 0x01,
 -                      .addr_ihl = 0x63,
 -                      .mask_ihl = 0x04,
 -                      .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR,
 +                      .addr_stat_drdy = 0x67,
                },
                .multi_read_bit = false,
                .bootime = 2,

diff --combined drivers/iio/pressure/bmp280-core.c
index 0d2ea3ee371b9fc8c0fff8c213f97ee3ab31b5a1,e442c5248427a772223206ef6bd87706eee5a87f..8f26428804a236fa1a38e612c0cd6aa3245b7eff
--- 1/drivers/iio/pressure/bmp280-core.c
--- 2/drivers/iio/pressure/bmp280-core.c
+++ b/drivers/iio/pressure/bmp280-core.c
@@@ -282,11 -282,6 +282,11 @@@ static int bmp280_read_temp(struct bmp2
        }
  
        adc_temp = be32_to_cpu(tmp) >> 12;
 +      if (adc_temp == BMP280_TEMP_SKIPPED) {
 +              /* reading was skipped */
 +              dev_err(data->dev, "reading temperature skipped\n");
 +              return -EIO;
 +      }
        comp_temp = bmp280_compensate_temp(data, adc_temp);
  
        /*
@@@ -322,11 -317,6 +322,11 @@@ static int bmp280_read_press(struct bmp
        }
  
        adc_press = be32_to_cpu(tmp) >> 12;
 +      if (adc_press == BMP280_PRESS_SKIPPED) {
 +              /* reading was skipped */
 +              dev_err(data->dev, "reading pressure skipped\n");
 +              return -EIO;
 +      }
        comp_press = bmp280_compensate_press(data, adc_press);
  
        *val = comp_press;
@@@ -355,11 -345,6 +355,11 @@@ static int bmp280_read_humid(struct bmp
        }
  
        adc_humidity = be16_to_cpu(tmp);
 +      if (adc_humidity == BMP280_HUMIDITY_SKIPPED) {
 +              /* reading was skipped */
 +              dev_err(data->dev, "reading humidity skipped\n");
 +              return -EIO;
 +      }
        comp_humidity = bmp280_compensate_humidity(data, adc_humidity);
  
        *val = comp_humidity;
@@@ -573,7 -558,7 +573,7 @@@ static int bmp280_chip_config(struct bm
        u8 osrs = BMP280_OSRS_TEMP_X(data->oversampling_temp + 1) |
                  BMP280_OSRS_PRESS_X(data->oversampling_press + 1);
  
-       ret = regmap_update_bits(data->regmap, BMP280_REG_CTRL_MEAS,
+       ret = regmap_write_bits(data->regmap, BMP280_REG_CTRL_MEAS,
                                 BMP280_OSRS_TEMP_MASK |
                                 BMP280_OSRS_PRESS_MASK |
                                 BMP280_MODE_MASK,
@@@ -612,20 -597,14 +612,20 @@@ static const struct bmp280_chip_info bm
  
  static int bme280_chip_config(struct bmp280_data *data)
  {
 -      int ret = bmp280_chip_config(data);
 +      int ret;
        u8 osrs = BMP280_OSRS_HUMIDITIY_X(data->oversampling_humid + 1);
  
 +      /*
 +       * Oversampling of humidity must be set before oversampling of
 +       * temperature/pressure is set to become effective.
 +       */
 +      ret = regmap_update_bits(data->regmap, BMP280_REG_CTRL_HUMIDITY,
 +                                BMP280_OSRS_HUMIDITY_MASK, osrs);
 +
        if (ret < 0)
                return ret;
  
 -      return regmap_update_bits(data->regmap, BMP280_REG_CTRL_HUMIDITY,
 -                                BMP280_OSRS_HUMIDITY_MASK, osrs);
 +      return bmp280_chip_config(data);
  }
  
  static const struct bmp280_chip_info bme280_chip_info = {

diff --combined drivers/iio/trigger/stm32-timer-trigger.c
index 9b9053494daf5ef2dd601db958a3c7177dcf3a27,a30ba6e1dfec5f0a262345ccbdceabc2768eb378..eb212f8c88793b2c1029f087b40733039b5d9f96
--- 1/drivers/iio/trigger/stm32-timer-trigger.c
--- 2/drivers/iio/trigger/stm32-timer-trigger.c
+++ b/drivers/iio/trigger/stm32-timer-trigger.c
@@@ -174,6 -174,7 +174,7 @@@ static void stm32_timer_stop(struct stm
                clk_disable(priv->clk);
  
        /* Stop timer */
+       regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, 0);
        regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0);
        regmap_write(priv->regmap, TIM_PSC, 0);
        regmap_write(priv->regmap, TIM_ARR, 0);
@@@ -402,32 -403,34 +403,32 @@@ static int stm32_counter_read_raw(struc
                                  int *val, int *val2, long mask)
  {
        struct stm32_timer_trigger *priv = iio_priv(indio_dev);
 +      u32 dat;
  
        switch (mask) {
        case IIO_CHAN_INFO_RAW:
 -      {
 -              u32 cnt;
 -
 -              regmap_read(priv->regmap, TIM_CNT, &cnt);
 -              *val = cnt;
 +              regmap_read(priv->regmap, TIM_CNT, &dat);
 +              *val = dat;
 +              return IIO_VAL_INT;
  
 +      case IIO_CHAN_INFO_ENABLE:
 +              regmap_read(priv->regmap, TIM_CR1, &dat);
 +              *val = (dat & TIM_CR1_CEN) ? 1 : 0;
                return IIO_VAL_INT;
 -      }
 -      case IIO_CHAN_INFO_SCALE:
 -      {
 -              u32 smcr;
  
 -              regmap_read(priv->regmap, TIM_SMCR, &smcr);
 -              smcr &= TIM_SMCR_SMS;
 +      case IIO_CHAN_INFO_SCALE:
 +              regmap_read(priv->regmap, TIM_SMCR, &dat);
 +              dat &= TIM_SMCR_SMS;
  
                *val = 1;
                *val2 = 0;
  
                /* in quadrature case scale = 0.25 */
 -              if (smcr == 3)
 +              if (dat == 3)
                        *val2 = 2;
  
                return IIO_VAL_FRACTIONAL_LOG2;
        }
 -      }
  
        return -EINVAL;
  }
@@@ -437,31 -440,15 +438,31 @@@ static int stm32_counter_write_raw(stru
                                   int val, int val2, long mask)
  {
        struct stm32_timer_trigger *priv = iio_priv(indio_dev);
 +      u32 dat;
  
        switch (mask) {
        case IIO_CHAN_INFO_RAW:
 -              regmap_write(priv->regmap, TIM_CNT, val);
 +              return regmap_write(priv->regmap, TIM_CNT, val);
  
 -              return IIO_VAL_INT;
        case IIO_CHAN_INFO_SCALE:
                /* fixed scale */
                return -EINVAL;
 +
 +      case IIO_CHAN_INFO_ENABLE:
 +              if (val) {
 +                      regmap_read(priv->regmap, TIM_CR1, &dat);
 +                      if (!(dat & TIM_CR1_CEN))
 +                              clk_enable(priv->clk);
 +                      regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN,
 +                                         TIM_CR1_CEN);
 +              } else {
 +                      regmap_read(priv->regmap, TIM_CR1, &dat);
 +                      regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN,
 +                                         0);
 +                      if (dat & TIM_CR1_CEN)
 +                              clk_disable(priv->clk);
 +              }
 +              return 0;
        }
  
        return -EINVAL;
@@@ -521,7 -508,7 +522,7 @@@ static int stm32_get_trigger_mode(struc
  
        regmap_read(priv->regmap, TIM_SMCR, &smcr);
  
 -      return smcr == TIM_SMCR_SMS ? 0 : -EINVAL;
 +      return (smcr & TIM_SMCR_SMS) == TIM_SMCR_SMS ? 0 : -EINVAL;
  }
  
  static const struct iio_enum stm32_trigger_mode_enum = {
@@@ -557,19 -544,9 +558,19 @@@ static int stm32_set_enable_mode(struc
  {
        struct stm32_timer_trigger *priv = iio_priv(indio_dev);
        int sms = stm32_enable_mode2sms(mode);
 +      u32 val;
  
        if (sms < 0)
                return sms;
 +      /*
 +       * Triggered mode sets CEN bit automatically by hardware. So, first
 +       * enable counter clock, so it can use it. Keeps it in sync with CEN.
 +       */
 +      if (sms == 6) {
 +              regmap_read(priv->regmap, TIM_CR1, &val);
 +              if (!(val & TIM_CR1_CEN))
 +                      clk_enable(priv->clk);
 +      }
  
        regmap_update_bits(priv->regmap, TIM_SMCR, TIM_SMCR_SMS, sms);
  
@@@ -631,14 -608,11 +632,14 @@@ static int stm32_get_quadrature_mode(st
  {
        struct stm32_timer_trigger *priv = iio_priv(indio_dev);
        u32 smcr;
 +      int mode;
  
        regmap_read(priv->regmap, TIM_SMCR, &smcr);
 -      smcr &= TIM_SMCR_SMS;
 +      mode = (smcr & TIM_SMCR_SMS) - 1;
 +      if ((mode < 0) || (mode > ARRAY_SIZE(stm32_quadrature_modes)))
 +              return -EINVAL;
  
 -      return smcr - 1;
 +      return mode;
  }
  
  static const struct iio_enum stm32_quadrature_mode_enum = {
@@@ -655,20 -629,13 +656,20 @@@ static const char *const stm32_count_di
  
  static int stm32_set_count_direction(struct iio_dev *indio_dev,
                                     const struct iio_chan_spec *chan,
 -                                   unsigned int mode)
 +                                   unsigned int dir)
  {
        struct stm32_timer_trigger *priv = iio_priv(indio_dev);
 +      u32 val;
 +      int mode;
  
 -      regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_DIR, mode);
 +      /* In encoder mode, direction is RO (given by TI1/TI2 signals) */
 +      regmap_read(priv->regmap, TIM_SMCR, &val);
 +      mode = (val & TIM_SMCR_SMS) - 1;
 +      if ((mode >= 0) || (mode < ARRAY_SIZE(stm32_quadrature_modes)))
 +              return -EBUSY;
  
 -      return 0;
 +      return regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_DIR,
 +                                dir ? TIM_CR1_DIR : 0);
  }
  
  static int stm32_get_count_direction(struct iio_dev *indio_dev,
@@@ -679,7 -646,7 +680,7 @@@
  
        regmap_read(priv->regmap, TIM_CR1, &cr1);
  
 -      return (cr1 & TIM_CR1_DIR);
 +      return ((cr1 & TIM_CR1_DIR) ? 1 : 0);
  }
  
  static const struct iio_enum stm32_count_direction_enum = {
@@@ -715,8 -682,9 +716,9 @@@ static ssize_t stm32_count_set_preset(s
        if (ret)
                return ret;
  
+       /* TIMx_ARR register shouldn't be buffered (ARPE=0) */
+       regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, 0);
        regmap_write(priv->regmap, TIM_ARR, preset);
-       regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, TIM_CR1_ARPE);
  
        return len;
  }
@@@ -742,9 -710,7 +744,9 @@@ static const struct iio_chan_spec_ext_i
  static const struct iio_chan_spec stm32_trigger_channel = {
        .type = IIO_COUNT,
        .channel = 0,
 -      .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
 +      .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
 +                            BIT(IIO_CHAN_INFO_ENABLE) |
 +                            BIT(IIO_CHAN_INFO_SCALE),
        .ext_info = stm32_trigger_count_info,
        .indexed = 1
  };