]> git.proxmox.com Git - mirror_ubuntu-hirsute-kernel.git/commitdiff
clk: at91: allow clock registration from C code
authorAlexandre Belloni <alexandre.belloni@bootlin.com>
Tue, 16 Oct 2018 14:21:44 +0000 (16:21 +0200)
committerStephen Boyd <sboyd@kernel.org>
Wed, 17 Oct 2018 17:44:25 +0000 (10:44 -0700)
Remove static keyword to allow functions to be used from other units. Also
move some struct and function declarations to pmc.h

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
[sboyd@kernel.org: Include pmc.h]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
14 files changed:
drivers/clk/at91/clk-generated.c
drivers/clk/at91/clk-i2s-mux.c
drivers/clk/at91/clk-main.c
drivers/clk/at91/clk-master.c
drivers/clk/at91/clk-peripheral.c
drivers/clk/at91/clk-pll.c
drivers/clk/at91/clk-plldiv.c
drivers/clk/at91/clk-programmable.c
drivers/clk/at91/clk-slow.c
drivers/clk/at91/clk-smd.c
drivers/clk/at91/clk-system.c
drivers/clk/at91/clk-usb.c
drivers/clk/at91/clk-utmi.c
drivers/clk/at91/pmc.h

index 6dfee6e588c432b9ad6d20e4909fad03aa3e48eb..0fe4d7f04225f6ae207a26e2b900c867e311f69b 100644 (file)
@@ -277,7 +277,7 @@ static void clk_generated_startup(struct clk_generated *gck)
                                        >> AT91_PMC_PCR_GCKDIV_OFFSET;
 }
 
-static struct clk_hw * __init
+struct clk_hw * __init
 at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock,
                            const char *name, const char **parent_names,
                            u8 num_parents, u8 id, bool pll_audio,
index f0c3c3079f042acec6c8ca84bdcb51449daa4252..276d055c8a4151df973b569c743d2709985d572c 100644 (file)
@@ -14,6 +14,8 @@
 
 #include <soc/at91/atmel-sfr.h>
 
+#include "pmc.h"
+
 #define        I2S_BUS_NR      2
 
 struct clk_i2s_mux {
@@ -48,7 +50,7 @@ static const struct clk_ops clk_i2s_mux_ops = {
        .determine_rate = __clk_mux_determine_rate,
 };
 
-static struct clk_hw * __init
+struct clk_hw * __init
 at91_clk_i2s_mux_register(struct regmap *regmap, const char *name,
                          const char * const *parent_names,
                          unsigned int num_parents, u8 bus_id)
index c813c27f2e58c6f8e62c523a1a9a8b1d212a96d8..82184009137d655cc02a8ec512ef1c088a6140df 100644 (file)
@@ -128,7 +128,7 @@ static const struct clk_ops main_osc_ops = {
        .is_prepared = clk_main_osc_is_prepared,
 };
 
-static struct clk_hw * __init
+struct clk_hw * __init
 at91_clk_register_main_osc(struct regmap *regmap,
                           const char *name,
                           const char *parent_name,
@@ -275,7 +275,7 @@ static const struct clk_ops main_rc_osc_ops = {
        .recalc_accuracy = clk_main_rc_osc_recalc_accuracy,
 };
 
-static struct clk_hw * __init
+struct clk_hw * __init
 at91_clk_register_main_rc_osc(struct regmap *regmap,
                              const char *name,
                              u32 frequency, u32 accuracy)
@@ -403,7 +403,7 @@ static const struct clk_ops rm9200_main_ops = {
        .recalc_rate = clk_rm9200_main_recalc_rate,
 };
 
-static struct clk_hw * __init
+struct clk_hw * __init
 at91_clk_register_rm9200_main(struct regmap *regmap,
                              const char *name,
                              const char *parent_name)
@@ -541,7 +541,7 @@ static const struct clk_ops sam9x5_main_ops = {
        .get_parent = clk_sam9x5_main_get_parent,
 };
 
-static struct clk_hw * __init
+struct clk_hw * __init
 at91_clk_register_sam9x5_main(struct regmap *regmap,
                              const char *name,
                              const char **parent_names,
index e9cba9fc26d706181ea0e73406cd8e60997fde82..088044bb6ea24bdb0a3124b19863837cf849b2e8 100644 (file)
 #define MASTER_DIV_SHIFT       8
 #define MASTER_DIV_MASK                0x3
 
-struct clk_master_characteristics {
-       struct clk_range output;
-       u32 divisors[4];
-       u8 have_div3_pres;
-};
-
-struct clk_master_layout {
-       u32 mask;
-       u8 pres_shift;
-};
-
 #define to_clk_master(hw) container_of(hw, struct clk_master, hw)
 
 struct clk_master {
@@ -120,7 +109,7 @@ static const struct clk_ops master_ops = {
        .get_parent = clk_master_get_parent,
 };
 
-static struct clk_hw * __init
+struct clk_hw * __init
 at91_clk_register_master(struct regmap *regmap,
                const char *name, int num_parents,
                const char **parent_names,
@@ -161,12 +150,12 @@ at91_clk_register_master(struct regmap *regmap,
 }
 
 
-static const struct clk_master_layout at91rm9200_master_layout = {
+const struct clk_master_layout at91rm9200_master_layout = {
        .mask = 0x31F,
        .pres_shift = 2,
 };
 
-static const struct clk_master_layout at91sam9x5_master_layout = {
+const struct clk_master_layout at91sam9x5_master_layout = {
        .mask = 0x373,
        .pres_shift = 4,
 };
index 7701183692308e8870a669658e8c24b4d14700e4..cb41d06a248169521961cd7790e0987aabd71bd8 100644 (file)
@@ -104,7 +104,7 @@ static const struct clk_ops peripheral_ops = {
        .is_enabled = clk_peripheral_is_enabled,
 };
 
-static struct clk_hw * __init
+struct clk_hw * __init
 at91_clk_register_peripheral(struct regmap *regmap, const char *name,
                             const char *parent_name, u32 id)
 {
@@ -331,7 +331,7 @@ static const struct clk_ops sam9x5_peripheral_ops = {
        .set_rate = clk_sam9x5_peripheral_set_rate,
 };
 
-static struct clk_hw * __init
+struct clk_hw * __init
 at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock,
                                    const char *name, const char *parent_name,
                                    u32 id, const struct clk_range *range)
index 72b6091eb7b944f50b6a2e3d9ceafa8077a851d2..31fff0b9d5c2782774684b8bb94374269e5f4894 100644 (file)
 #define PLL_OUT_SHIFT          14
 #define PLL_MAX_ID             1
 
-struct clk_pll_characteristics {
-       struct clk_range input;
-       int num_output;
-       struct clk_range *output;
-       u16 *icpll;
-       u8 *out;
-};
-
-struct clk_pll_layout {
-       u32 pllr_mask;
-       u16 mul_mask;
-       u8 mul_shift;
-};
-
 #define to_clk_pll(hw) container_of(hw, struct clk_pll, hw)
 
 struct clk_pll {
@@ -285,7 +271,7 @@ static const struct clk_ops pll_ops = {
        .set_rate = clk_pll_set_rate,
 };
 
-static struct clk_hw * __init
+struct clk_hw * __init
 at91_clk_register_pll(struct regmap *regmap, const char *name,
                      const char *parent_name, u8 id,
                      const struct clk_pll_layout *layout,
@@ -331,25 +317,25 @@ at91_clk_register_pll(struct regmap *regmap, const char *name,
 }
 
 
-static const struct clk_pll_layout at91rm9200_pll_layout = {
+const struct clk_pll_layout at91rm9200_pll_layout = {
        .pllr_mask = 0x7FFFFFF,
        .mul_shift = 16,
        .mul_mask = 0x7FF,
 };
 
-static const struct clk_pll_layout at91sam9g45_pll_layout = {
+const struct clk_pll_layout at91sam9g45_pll_layout = {
        .pllr_mask = 0xFFFFFF,
        .mul_shift = 16,
        .mul_mask = 0xFF,
 };
 
-static const struct clk_pll_layout at91sam9g20_pllb_layout = {
+const struct clk_pll_layout at91sam9g20_pllb_layout = {
        .pllr_mask = 0x3FFFFF,
        .mul_shift = 16,
        .mul_mask = 0x3F,
 };
 
-static const struct clk_pll_layout sama5d3_pll_layout = {
+const struct clk_pll_layout sama5d3_pll_layout = {
        .pllr_mask = 0x1FFFFFF,
        .mul_shift = 18,
        .mul_mask = 0x7F,
index b4afaf22f3fdc93277582746976b4d3ff0af5267..de803a2b27d3b784267097a55b4260124205c9df 100644 (file)
@@ -75,7 +75,7 @@ static const struct clk_ops plldiv_ops = {
        .set_rate = clk_plldiv_set_rate,
 };
 
-static struct clk_hw * __init
+struct clk_hw * __init
 at91_clk_register_plldiv(struct regmap *regmap, const char *name,
                         const char *parent_name)
 {
index 0e6aab1252fc40dc6a4896abe875f51d9c9b8eb6..df302bfa8259417ac0402969d1fdb676ac9837f1 100644 (file)
 #define PROG_PRES(layout, pckr)        ((pckr >> layout->pres_shift) & PROG_PRES_MASK)
 #define PROG_MAX_RM9200_CSS    3
 
-struct clk_programmable_layout {
-       u8 pres_shift;
-       u8 css_mask;
-       u8 have_slck_mck;
-};
-
 struct clk_programmable {
        struct clk_hw hw;
        struct regmap *regmap;
@@ -170,7 +164,7 @@ static const struct clk_ops programmable_ops = {
        .set_rate = clk_programmable_set_rate,
 };
 
-static struct clk_hw * __init
+struct clk_hw * __init
 at91_clk_register_programmable(struct regmap *regmap,
                               const char *name, const char **parent_names,
                               u8 num_parents, u8 id,
@@ -211,19 +205,19 @@ at91_clk_register_programmable(struct regmap *regmap,
        return hw;
 }
 
-static const struct clk_programmable_layout at91rm9200_programmable_layout = {
+const struct clk_programmable_layout at91rm9200_programmable_layout = {
        .pres_shift = 2,
        .css_mask = 0x3,
        .have_slck_mck = 0,
 };
 
-static const struct clk_programmable_layout at91sam9g45_programmable_layout = {
+const struct clk_programmable_layout at91sam9g45_programmable_layout = {
        .pres_shift = 2,
        .css_mask = 0x3,
        .have_slck_mck = 1,
 };
 
-static const struct clk_programmable_layout at91sam9x5_programmable_layout = {
+const struct clk_programmable_layout at91sam9x5_programmable_layout = {
        .pres_shift = 4,
        .css_mask = 0x7,
        .have_slck_mck = 0,
index 560a8b9abf9312bd921311bcf88d121727750c83..a890132db68f212b91ef6d4fbfe1fea637edeaf2 100644 (file)
@@ -40,7 +40,7 @@ static const struct clk_ops sam9260_slow_ops = {
        .get_parent = clk_sam9260_slow_get_parent,
 };
 
-static struct clk_hw * __init
+struct clk_hw * __init
 at91_clk_register_sam9260_slow(struct regmap *regmap,
                               const char *name,
                               const char **parent_names,
index 965c662b90a5ab6f3dfdcd5b4cd2382d79f4422e..bbf5dc91777f6151105ce20bb5d946aaab3b5095 100644 (file)
@@ -111,7 +111,7 @@ static const struct clk_ops at91sam9x5_smd_ops = {
        .set_rate = at91sam9x5_clk_smd_set_rate,
 };
 
-static struct clk_hw * __init
+struct clk_hw * __init
 at91sam9x5_clk_register_smd(struct regmap *regmap, const char *name,
                            const char **parent_names, u8 num_parents)
 {
index 86a36809765de84c94b9e29e55e129b2905b65ae..1ac0144a38c0329b152070597affeb0e24487fcf 100644 (file)
@@ -88,7 +88,7 @@ static const struct clk_ops system_ops = {
        .is_prepared = clk_system_is_prepared,
 };
 
-static struct clk_hw * __init
+struct clk_hw * __init
 at91_clk_register_system(struct regmap *regmap, const char *name,
                         const char *parent_name, u8 id)
 {
index 791770a563fcce83d5538a52b5cc86bcc7a925c7..a728320877dd44e59a23dc2a9df24e2a1f1f125b 100644 (file)
@@ -192,7 +192,7 @@ static const struct clk_ops at91sam9n12_usb_ops = {
        .set_rate = at91sam9x5_clk_usb_set_rate,
 };
 
-static struct clk_hw * __init
+struct clk_hw * __init
 at91sam9x5_clk_register_usb(struct regmap *regmap, const char *name,
                            const char **parent_names, u8 num_parents)
 {
@@ -225,7 +225,7 @@ at91sam9x5_clk_register_usb(struct regmap *regmap, const char *name,
        return hw;
 }
 
-static struct clk_hw * __init
+struct clk_hw * __init
 at91sam9n12_clk_register_usb(struct regmap *regmap, const char *name,
                             const char *parent_name)
 {
@@ -342,7 +342,7 @@ static const struct clk_ops at91rm9200_usb_ops = {
        .set_rate = at91rm9200_clk_usb_set_rate,
 };
 
-static struct clk_hw * __init
+struct clk_hw * __init
 at91rm9200_clk_register_usb(struct regmap *regmap, const char *name,
                            const char *parent_name, const u32 *divisors)
 {
index cd8d689138ff9917822aec3416a101bd0eb665c6..6c69b6ac71e132ad4ec3721a7d16947fb8a26408 100644 (file)
@@ -125,7 +125,7 @@ static const struct clk_ops utmi_ops = {
        .recalc_rate = clk_utmi_recalc_rate,
 };
 
-static struct clk_hw * __init
+struct clk_hw * __init
 at91_clk_register_utmi(struct regmap *regmap_pmc, struct regmap *regmap_sfr,
                       const char *name, const char *parent_name)
 {
index d22b1fa9ecdce8fa621dc3d7eaa66a4580585911..3dc50267a458999817a7cdafadb057377219782d 100644 (file)
@@ -26,9 +26,151 @@ struct clk_range {
 
 #define CLK_RANGE(MIN, MAX) {.min = MIN, .max = MAX,}
 
+struct clk_master_layout {
+       u32 mask;
+       u8 pres_shift;
+};
+
+extern const struct clk_master_layout at91rm9200_master_layout;
+extern const struct clk_master_layout at91sam9x5_master_layout;
+
+struct clk_master_characteristics {
+       struct clk_range output;
+       u32 divisors[4];
+       u8 have_div3_pres;
+};
+
+struct clk_pll_layout {
+       u32 pllr_mask;
+       u16 mul_mask;
+       u8 mul_shift;
+};
+
+extern const struct clk_pll_layout at91rm9200_pll_layout;
+extern const struct clk_pll_layout at91sam9g45_pll_layout;
+extern const struct clk_pll_layout at91sam9g20_pllb_layout;
+extern const struct clk_pll_layout sama5d3_pll_layout;
+
+struct clk_pll_characteristics {
+       struct clk_range input;
+       int num_output;
+       struct clk_range *output;
+       u16 *icpll;
+       u8 *out;
+};
+
+struct clk_programmable_layout {
+       u8 pres_shift;
+       u8 css_mask;
+       u8 have_slck_mck;
+};
+
+extern const struct clk_programmable_layout at91rm9200_programmable_layout;
+extern const struct clk_programmable_layout at91sam9g45_programmable_layout;
+extern const struct clk_programmable_layout at91sam9x5_programmable_layout;
+
 int of_at91_get_clk_range(struct device_node *np, const char *propname,
                          struct clk_range *range);
 
+struct clk_hw *of_clk_hw_pmc_get(struct of_phandle_args *clkspec, void *data);
+
+struct clk_hw * __init
+at91_clk_register_audio_pll_frac(struct regmap *regmap, const char *name,
+                                const char *parent_name);
+
+struct clk_hw * __init
+at91_clk_register_audio_pll_pad(struct regmap *regmap, const char *name,
+                               const char *parent_name);
+
+struct clk_hw * __init
+at91_clk_register_audio_pll_pmc(struct regmap *regmap, const char *name,
+                               const char *parent_name);
+
+struct clk_hw * __init
+at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock,
+                           const char *name, const char **parent_names,
+                           u8 num_parents, u8 id, bool pll_audio,
+                           const struct clk_range *range);
+
+struct clk_hw * __init
+at91_clk_register_h32mx(struct regmap *regmap, const char *name,
+                       const char *parent_name);
+
+struct clk_hw * __init
+at91_clk_i2s_mux_register(struct regmap *regmap, const char *name,
+                         const char * const *parent_names,
+                         unsigned int num_parents, u8 bus_id);
+
+struct clk_hw * __init
+at91_clk_register_main_rc_osc(struct regmap *regmap, const char *name,
+                             u32 frequency, u32 accuracy);
+struct clk_hw * __init
+at91_clk_register_main_osc(struct regmap *regmap, const char *name,
+                          const char *parent_name, bool bypass);
+struct clk_hw * __init
+at91_clk_register_rm9200_main(struct regmap *regmap,
+                             const char *name,
+                             const char *parent_name);
+struct clk_hw * __init
+at91_clk_register_sam9x5_main(struct regmap *regmap, const char *name,
+                             const char **parent_names, int num_parents);
+
+struct clk_hw * __init
+at91_clk_register_master(struct regmap *regmap, const char *name,
+                        int num_parents, const char **parent_names,
+                        const struct clk_master_layout *layout,
+                        const struct clk_master_characteristics *characteristics);
+
+struct clk_hw * __init
+at91_clk_register_peripheral(struct regmap *regmap, const char *name,
+                            const char *parent_name, u32 id);
+struct clk_hw * __init
+at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock,
+                                   const char *name, const char *parent_name,
+                                   u32 id, const struct clk_range *range);
+
+struct clk_hw * __init
+at91_clk_register_pll(struct regmap *regmap, const char *name,
+                     const char *parent_name, u8 id,
+                     const struct clk_pll_layout *layout,
+                     const struct clk_pll_characteristics *characteristics);
+struct clk_hw * __init
+at91_clk_register_plldiv(struct regmap *regmap, const char *name,
+                        const char *parent_name);
+
+struct clk_hw * __init
+at91_clk_register_programmable(struct regmap *regmap, const char *name,
+                              const char **parent_names, u8 num_parents, u8 id,
+                              const struct clk_programmable_layout *layout);
+
+struct clk_hw * __init
+at91_clk_register_sam9260_slow(struct regmap *regmap,
+                              const char *name,
+                              const char **parent_names,
+                              int num_parents);
+
+struct clk_hw * __init
+at91sam9x5_clk_register_smd(struct regmap *regmap, const char *name,
+                           const char **parent_names, u8 num_parents);
+
+struct clk_hw * __init
+at91_clk_register_system(struct regmap *regmap, const char *name,
+                        const char *parent_name, u8 id);
+
+struct clk_hw * __init
+at91sam9x5_clk_register_usb(struct regmap *regmap, const char *name,
+                           const char **parent_names, u8 num_parents);
+struct clk_hw * __init
+at91sam9n12_clk_register_usb(struct regmap *regmap, const char *name,
+                            const char *parent_name);
+struct clk_hw * __init
+at91rm9200_clk_register_usb(struct regmap *regmap, const char *name,
+                           const char *parent_name, const u32 *divisors);
+
+struct clk_hw * __init
+at91_clk_register_utmi(struct regmap *regmap_pmc, struct regmap *regmap_sfr,
+                      const char *name, const char *parent_name);
+
 #ifdef CONFIG_PM
 void pmc_register_id(u8 id);
 void pmc_register_pck(u8 pck);