uint64_t diff;
diff = qemu_get_clock(vm_clock) - tb_env->purr_start;
-
+
return tb_env->purr_load + muldiv64(diff, tb_env->tb_freq, ticks_per_sec);
}
#endif /* defined(TARGET_PPC64H) */
}
static void __cpu_ppc_store_decr (CPUState *env, uint64_t *nextp,
- struct QEMUTimer *timer,
- void (*raise_excp)(CPUState *),
- uint32_t decr, uint32_t value,
- int is_excp)
+ struct QEMUTimer *timer,
+ void (*raise_excp)(CPUState *),
+ uint32_t decr, uint32_t value,
+ int is_excp)
{
ppc_tb_t *tb_env = env->tb_env;
uint64_t now, next;
return 0;
}
-
#if 0
/*****************************************************************************/
/* Handle system reset (for now, just stop emulation) */
tmp = ldl_phys(sr_base + 8);
#if defined(DEBUG_SLB)
if (loglevel != 0) {
- fprintf(logfile, "%s: seg %d " PADDRX " %016" PRIx64 " %08" PRIx32 "\n",
- __func__, n, sr_base, tmp64, tmp);
+ fprintf(logfile, "%s: seg %d " PADDRX " %016" PRIx64 " %08"
+ PRIx32 "\n", __func__, n, sr_base, tmp64, tmp);
}
#endif
if (tmp64 & 0x0000000008000000ULL) {
}
}
#if defined (DEBUG_MMU)
- if (loglevel != 0) {
- target_phys_addr_t curaddr;
- uint32_t a0, a1, a2, a3;
+ if (loglevel != 0) {
+ target_phys_addr_t curaddr;
+ uint32_t a0, a1, a2, a3;
+ fprintf(logfile,
+ "Page table: " PADDRX " len " PADDRX "\n",
+ sdr, mask + 0x80);
+ for (curaddr = sdr; curaddr < (sdr + mask + 0x80);
+ curaddr += 16) {
+ a0 = ldl_phys(curaddr);
+ a1 = ldl_phys(curaddr + 4);
+ a2 = ldl_phys(curaddr + 8);
+ a3 = ldl_phys(curaddr + 12);
+ if (a0 != 0 || a1 != 0 || a2 != 0 || a3 != 0) {
fprintf(logfile,
- "Page table: " PADDRX " len " PADDRX "\n",
- sdr, mask + 0x80);
- for (curaddr = sdr; curaddr < (sdr + mask + 0x80);
- curaddr += 16) {
- a0 = ldl_phys(curaddr);
- a1 = ldl_phys(curaddr + 4);
- a2 = ldl_phys(curaddr + 8);
- a3 = ldl_phys(curaddr + 12);
- if (a0 != 0 || a1 != 0 || a2 != 0 || a3 != 0) {
- fprintf(logfile,
- PADDRX ": %08x %08x %08x %08x\n",
- curaddr, a0, a1, a2, a3);
- }
- }
+ PADDRX ": %08x %08x %08x %08x\n",
+ curaddr, a0, a1, a2, a3);
}
+ }
+ }
#endif
} else {
#if defined (DEBUG_MMU)
env->DBAT[1][nr] = value;
}
-
/*****************************************************************************/
/* TLB management */
void ppc_tlb_invalidate_all (CPUPPCState *env)
}
#endif
-
/*****************************************************************************/
/* Special registers manipulation */
#if defined(TARGET_PPC64)
glue(stl, MEMSUFFIX)(EA, u.u);
}
-
PPC_STF_OP(fd_le, stfqr);
PPC_STF_OP(fs_le, stfsr);
PPC_STF_OP(fiwx_le, stfiwxr);
_PPC_SPE_LD_OP(name, op)
#endif
-
#define _PPC_SPE_ST_OP(name, op) \
void OPPROTO glue(glue(op_spe_st, name), MEMSUFFIX) (void) \
{ \