/ {
core-module@10000000 {
- compatible = "arm,core-module-integrator";
+ compatible = "arm,core-module-integrator", "syscon";
reg = <0x10000000 0x200>;
};
select GENERIC_CLOCKEVENTS
select HAVE_TCM
select ICST
+ select MFD_SYSCON
select MULTI_IRQ_HANDLER
select PLAT_VERSATILE
+ select POWER_RESET
+ select POWER_RESET_VERSATILE
+ select POWER_SUPPLY
select SPARSE_IRQ
select USE_OF
select VERSATILE_FPGA_IRQ
#define CM_CTRL_LED (1 << 0)
#define CM_CTRL_nMBDET (1 << 1)
#define CM_CTRL_REMAP (1 << 2)
-#define CM_CTRL_RESET (1 << 3)
/*
* Integrator/AP,PP2 specific
void integrator_init_early(void);
int integrator_init(bool is_cp);
void integrator_reserve(void);
-void integrator_restart(enum reboot_mode, const char *);
void integrator_init_sysfs(struct device *parent, u32 id);
memblock_reserve(PHYS_OFFSET, __pa(swapper_pg_dir) - PHYS_OFFSET);
}
-/*
- * To reset, we hit the on-board reset register in the system FPGA
- */
-void integrator_restart(enum reboot_mode mode, const char *cmd)
-{
- cm_control(CM_CTRL_RESET, CM_CTRL_RESET);
-}
-
static u32 integrator_id;
static ssize_t intcp_get_manf(struct device *dev,
.init_early = ap_init_early,
.init_irq = ap_init_irq_of,
.init_machine = ap_init_of,
- .restart = integrator_restart,
.dt_compat = ap_dt_board_compat,
MACHINE_END
.init_early = intcp_init_early,
.init_irq = intcp_init_irq_of,
.init_machine = intcp_init_of,
- .restart = integrator_restart,
.dt_compat = intcp_dt_board_compat,
MACHINE_END