drm/amdgpu: enable vcn3.0 for van gogh

Same as other VCN 3.0 asics.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
index 495c3d7bb2b2b468ced0c3ee06c27e69662e8c99..81102598cde7ceaf693e752a3ba646ec81fdd82f 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
@@ -44,6 +44,7 @@
 #define FIRMWARE_NAVI12        "amdgpu/navi12_vcn.bin"
 #define FIRMWARE_SIENNA_CICHLID        "amdgpu/sienna_cichlid_vcn.bin"
 #define FIRMWARE_NAVY_FLOUNDER         "amdgpu/navy_flounder_vcn.bin"
+#define FIRMWARE_VANGOGH       "amdgpu/vangogh_vcn.bin"
 
 MODULE_FIRMWARE(FIRMWARE_RAVEN);
 MODULE_FIRMWARE(FIRMWARE_PICASSO);
@@ -55,6 +56,7 @@ MODULE_FIRMWARE(FIRMWARE_NAVI14);
 MODULE_FIRMWARE(FIRMWARE_NAVI12);
 MODULE_FIRMWARE(FIRMWARE_SIENNA_CICHLID);
 MODULE_FIRMWARE(FIRMWARE_NAVY_FLOUNDER);
+MODULE_FIRMWARE(FIRMWARE_VANGOGH);
 
 static void amdgpu_vcn_idle_work_handler(struct work_struct *work);
 
@@ -123,6 +125,12 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev)
                    (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
                        adev->vcn.indirect_sram = true;
                break;
+       case CHIP_VANGOGH:
+               fw_name = FIRMWARE_VANGOGH;
+               if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) &&
+                   (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
+                       adev->vcn.indirect_sram = true;
+               break;
        default:
                return -EINVAL;
        }

diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index da6eed18110d0979a0a9fc58cd6de65b73c53ca4..1666d43197cbcef883cc73309cfbb598511cf5f6 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -577,6 +577,8 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
                        amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
                amdgpu_device_ip_block_add(adev, &gfx_v10_0_ip_block);
                amdgpu_device_ip_block_add(adev, &sdma_v5_2_ip_block);
+               amdgpu_device_ip_block_add(adev, &vcn_v3_0_ip_block);
+               amdgpu_device_ip_block_add(adev, &jpeg_v3_0_ip_block);
                break;
        default:
                return -EINVAL;