PIC reset fix (initial patch by Hidemi KAWAI)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@836 c046a42c-6fe2-441c-8c8c-71466251a162

diff --git a/Changelog b/Changelog
index a1df55cf0fb6be8e4a0151684d34f8ea41d90c97..a4717afbb5e7bed22d63cb381c36322196faad41 100644 (file)
--- a/Changelog
+++ b/Changelog
@@ -13,6 +13,7 @@ version 0.5.6:
   - NE2K PCI support
   - dummy VGA PCI support
   - VGA font selection fix (Daniel Serpell)
+  - PIC reset fix (Hidemi KAWAI)
 
 version 0.5.5:
 

diff --git a/cpu-all.h b/cpu-all.h
index 0ed5d00f4e36e3886c320f1ae1bde8a5bc7adccf..69b6e7c3652e615400f950f4c6541b40c3b2fdc9 100644 (file)
--- a/cpu-all.h
+++ b/cpu-all.h
@@ -569,7 +569,6 @@ void page_unprotect_range(uint8_t *data, unsigned long data_size);
 #define cpu_init cpu_x86_init
 #define cpu_exec cpu_x86_exec
 #define cpu_gen_code cpu_x86_gen_code
-#define cpu_interrupt cpu_x86_interrupt
 #define cpu_signal_handler cpu_x86_signal_handler
 #define cpu_dump_state cpu_x86_dump_state
 
@@ -579,7 +578,6 @@ void page_unprotect_range(uint8_t *data, unsigned long data_size);
 #define cpu_init cpu_arm_init
 #define cpu_exec cpu_arm_exec
 #define cpu_gen_code cpu_arm_gen_code
-#define cpu_interrupt cpu_arm_interrupt
 #define cpu_signal_handler cpu_arm_signal_handler
 #define cpu_dump_state cpu_arm_dump_state
 
@@ -589,7 +587,6 @@ void page_unprotect_range(uint8_t *data, unsigned long data_size);
 #define cpu_init cpu_sparc_init
 #define cpu_exec cpu_sparc_exec
 #define cpu_gen_code cpu_sparc_gen_code
-#define cpu_interrupt cpu_sparc_interrupt
 #define cpu_signal_handler cpu_sparc_signal_handler
 #define cpu_dump_state cpu_sparc_dump_state
 
@@ -599,7 +596,6 @@ void page_unprotect_range(uint8_t *data, unsigned long data_size);
 #define cpu_init cpu_ppc_init
 #define cpu_exec cpu_ppc_exec
 #define cpu_gen_code cpu_ppc_gen_code
-#define cpu_interrupt cpu_ppc_interrupt
 #define cpu_signal_handler cpu_ppc_signal_handler
 #define cpu_dump_state cpu_ppc_dump_state
 
@@ -620,6 +616,7 @@ extern int code_copy_enabled;
 #define CPU_INTERRUPT_EXITTB 0x04 /* exit the current TB (use for x86 a20 case) */
 #define CPU_INTERRUPT_TIMER  0x08 /* internal timer exception pending */
 void cpu_interrupt(CPUState *s, int mask);
+void cpu_reset_interrupt(CPUState *env, int mask);
 
 int cpu_breakpoint_insert(CPUState *env, target_ulong pc);
 int cpu_breakpoint_remove(CPUState *env, target_ulong pc);

diff --git a/exec.c b/exec.c
index 441c5626f7af8775a19b6769bc2e914e274963d8..5357dcdfbc1ee73da9d9ba47d8f54d96a615b4a3 100644 (file)
--- a/exec.c
+++ b/exec.c
@@ -1112,6 +1112,11 @@ void cpu_interrupt(CPUState *env, int mask)
     }
 }
 
+void cpu_reset_interrupt(CPUState *env, int mask)
+{
+    env->interrupt_request &= ~mask;
+}
+
 CPULogItem cpu_log_items[] = {
     { CPU_LOG_TB_OUT_ASM, "out_asm", 
       "show generated host assembly code for each compiled TB" },

diff --git a/hw/i8259.c b/hw/i8259.c
index e09bc9f3128ad0508677939a5925e47eeb9d2930..809ea95a5dec4d6f2cb5d2a6139af3ba3a56ecc1 100644 (file)
--- a/hw/i8259.c
+++ b/hw/i8259.c
@@ -231,6 +231,8 @@ static void pic_ioport_write(void *opaque, uint32_t addr, uint32_t val)
             tmp = s->elcr_mask;
             memset(s, 0, sizeof(PicState));
             s->elcr_mask = tmp;
+            /* deassert a pending interrupt */
+            cpu_reset_interrupt(cpu_single_env, CPU_INTERRUPT_HARD);
 
             s->init_state = 1;
             s->init4 = val & 1;