void riscv_cpu_swap_hypervisor_regs(CPURISCVState *env)
{
- uint64_t sd = riscv_cpu_mxl(env) == MXL_RV32 ? MSTATUS32_SD : MSTATUS64_SD;
uint64_t mstatus_mask = MSTATUS_MXR | MSTATUS_SUM | MSTATUS_FS |
MSTATUS_SPP | MSTATUS_SPIE | MSTATUS_SIE |
- MSTATUS64_UXL | sd;
+ MSTATUS64_UXL;
bool current_virt = riscv_cpu_virt_enabled(env);
g_assert(riscv_has_ext(env, RVH));
}
/* Machine Trap Setup */
+
+/* We do not store SD explicitly, only compute it on demand. */
+static uint64_t add_status_sd(RISCVMXL xl, uint64_t status)
+{
+ if ((status & MSTATUS_FS) == MSTATUS_FS ||
+ (status & MSTATUS_XS) == MSTATUS_XS) {
+ switch (xl) {
+ case MXL_RV32:
+ return status | MSTATUS32_SD;
+ case MXL_RV64:
+ return status | MSTATUS64_SD;
+ default:
+ g_assert_not_reached();
+ }
+ }
+ return status;
+}
+
static RISCVException read_mstatus(CPURISCVState *env, int csrno,
target_ulong *val)
{
- *val = env->mstatus;
+ *val = add_status_sd(riscv_cpu_mxl(env), env->mstatus);
return RISCV_EXCP_NONE;
}
{
uint64_t mstatus = env->mstatus;
uint64_t mask = 0;
- int dirty;
/* flush tlb on mstatus fields that affect VM */
if ((val ^ mstatus) & (MSTATUS_MXR | MSTATUS_MPP | MSTATUS_MPV |
mstatus = (mstatus & ~mask) | (val & mask);
- dirty = ((mstatus & MSTATUS_FS) == MSTATUS_FS) |
- ((mstatus & MSTATUS_XS) == MSTATUS_XS);
- if (riscv_cpu_mxl(env) == MXL_RV32) {
- mstatus = set_field(mstatus, MSTATUS32_SD, dirty);
- } else {
- mstatus = set_field(mstatus, MSTATUS64_SD, dirty);
+ if (riscv_cpu_mxl(env) == MXL_RV64) {
/* SXL and UXL fields are for now read only */
mstatus = set_field(mstatus, MSTATUS64_SXL, MXL_RV64);
mstatus = set_field(mstatus, MSTATUS64_UXL, MXL_RV64);
{
target_ulong mask = (sstatus_v1_10_mask);
- if (riscv_cpu_mxl(env) == MXL_RV32) {
- mask |= SSTATUS32_SD;
- } else {
- mask |= SSTATUS64_SD;
- }
-
- *val = env->mstatus & mask;
+ /* TODO: Use SXL not MXL. */
+ *val = add_status_sd(riscv_cpu_mxl(env), env->mstatus & mask);
return RISCV_EXCP_NONE;
}
static void mark_fs_dirty(DisasContext *ctx)
{
TCGv tmp;
- target_ulong sd = get_xl(ctx) == MXL_RV32 ? MSTATUS32_SD : MSTATUS64_SD;
if (ctx->mstatus_fs != MSTATUS_FS) {
/* Remember the state change for the rest of the TB. */
tmp = tcg_temp_new();
tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPURISCVState, mstatus));
- tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS | sd);
+ tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS);
tcg_gen_st_tl(tmp, cpu_env, offsetof(CPURISCVState, mstatus));
tcg_temp_free(tmp);
}
tmp = tcg_temp_new();
tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPURISCVState, mstatus_hs));
- tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS | sd);
+ tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS);
tcg_gen_st_tl(tmp, cpu_env, offsetof(CPURISCVState, mstatus_hs));
tcg_temp_free(tmp);
}