drm/amd/display: Register on VLBLANK ISR.

Switch from VUPDATE to VBLANK.

Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 214cd38b81358fc95b7e0c30416a4afcbe92af9e..b85f34ba158cc2a2589206fa9f233e1b60233575 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -201,7 +201,7 @@ static void dm_crtc_high_irq(void *interrupt_params)
        uint8_t crtc_index = 0;
        struct amdgpu_crtc *acrtc;
 
-       acrtc = get_crtc_by_otg_inst(adev, irq_params->irq_src - IRQ_TYPE_VUPDATE);
+       acrtc = get_crtc_by_otg_inst(adev, irq_params->irq_src - IRQ_TYPE_VBLANK);
 
        if (acrtc)
                crtc_index = acrtc->crtc_id;
@@ -1026,9 +1026,10 @@ static int dce110_register_irq_handlers(struct amdgpu_device *adev)
         *    amdgpu_dm_irq_handler() will re-direct the interrupt to DC
         *    for acknowledging and handling. */
 
-       for (i = VISLANDS30_IV_SRCID_D1_V_UPDATE_INT;
-                       i <= VISLANDS30_IV_SRCID_D6_V_UPDATE_INT; i += 2) {
-               r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, i, &adev->crtc_irq);
+       /* Use VBLANK interrupt */
+       for (i = 0; i < adev->mode_info.num_crtc; i++) {
+               r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, i+1, &adev->crtc_irq);
+
                if (r) {
                        DRM_ERROR("Failed to add crtc irq id!\n");
                        return r;
@@ -1036,9 +1037,9 @@ static int dce110_register_irq_handlers(struct amdgpu_device *adev)
 
                int_params.int_context = INTERRUPT_HIGH_IRQ_CONTEXT;
                int_params.irq_source =
-                       dc_interrupt_to_irq_source(dc, i, 0);
+                       dc_interrupt_to_irq_source(dc, i+1, 0);
 
-               c_irq_params = &adev->dm.vupdate_params[int_params.irq_source - DC_IRQ_SOURCE_VUPDATE1];
+               c_irq_params = &adev->dm.vblank_params[int_params.irq_source - DC_IRQ_SOURCE_VBLANK1];
 
                c_irq_params->adev = adev;
                c_irq_params->irq_src = int_params.irq_source;

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
index 1b54566f5da16e64aed565aae940e82ae024525a..d6ebba012e15ab20aeff0cee6e819466a942c498 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
@@ -105,7 +105,7 @@ struct amdgpu_display_manager {
        pflip_params[DC_IRQ_SOURCE_PFLIP_LAST - DC_IRQ_SOURCE_PFLIP_FIRST + 1];
 
        struct common_irq_params
-       vupdate_params[DC_IRQ_SOURCE_VUPDATE6 - DC_IRQ_SOURCE_VUPDATE1 + 1];
+       vblank_params[DC_IRQ_SOURCE_VBLANK6 - DC_IRQ_SOURCE_VBLANK1 + 1];
 
        /* this spin lock synchronizes access to 'irq_handler_list_table' */
        spinlock_t irq_handler_list_table_lock;

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c
index 20e074971bff248999147e206009782e804c6177..682e9c3ad8e5bbfc7dc99a617ad8d734fc0ea6cb 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c
@@ -736,7 +736,7 @@ static int amdgpu_dm_set_crtc_irq_state(struct amdgpu_device *adev,
                source,
                crtc_id,
                state,
-               IRQ_TYPE_VUPDATE,
+               IRQ_TYPE_VBLANK,
                __func__);
 }