i40e/i40evf: add VIRTCHNL_VF_OFFLOAD flag

Add virtual channel offload capability to support RX polling mode in the
VF.

Change-ID: Ib643ae2a7506dfc75fc489fc207493fabefa4832
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Signed-off-by: Anjali Singhai Jain <anjali.singhai@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>

diff --git a/drivers/net/ethernet/intel/i40e/i40e_register.h b/drivers/net/ethernet/intel/i40e/i40e_register.h
index acae6c744bc2ee149f3bf3f325c3877569b3dc48..dc0402fe3370049e5fd9938f2be23d1649a71e27 100644 (file)
--- a/drivers/net/ethernet/intel/i40e/i40e_register.h
+++ b/drivers/net/ethernet/intel/i40e/i40e_register.h
@@ -873,6 +873,13 @@
 #define I40E_PFINT_CEQCTL_CAUSE_ENA_MASK I40E_MASK(0x1, I40E_PFINT_CEQCTL_CAUSE_ENA_SHIFT)
 #define I40E_PFINT_CEQCTL_INTEVENT_SHIFT 31
 #define I40E_PFINT_CEQCTL_INTEVENT_MASK I40E_MASK(0x1, I40E_PFINT_CEQCTL_INTEVENT_SHIFT)
+#define I40E_GLINT_CTL 0x0003F800 /* Reset: CORER */
+#define I40E_GLINT_CTL_DIS_AUTOMASK_PF0_SHIFT 0
+#define I40E_GLINT_CTL_DIS_AUTOMASK_PF0_MASK I40E_MASK(0x1, I40E_GLINT_CTL_DIS_AUTOMASK_PF0_SHIFT)
+#define I40E_GLINT_CTL_DIS_AUTOMASK_VF0_SHIFT 1
+#define I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK I40E_MASK(0x1, I40E_GLINT_CTL_DIS_AUTOMASK_VF0_SHIFT)
+#define I40E_GLINT_CTL_DIS_AUTOMASK_N_SHIFT 2
+#define I40E_GLINT_CTL_DIS_AUTOMASK_N_MASK I40E_MASK(0x1, I40E_GLINT_CTL_DIS_AUTOMASK_N_SHIFT)
 #define I40E_PFINT_DYN_CTL0 0x00038480 /* Reset: PFR */
 #define I40E_PFINT_DYN_CTL0_INTENA_SHIFT 0
 #define I40E_PFINT_DYN_CTL0_INTENA_MASK I40E_MASK(0x1, I40E_PFINT_DYN_CTL0_INTENA_SHIFT)

diff --git a/drivers/net/ethernet/intel/i40e/i40e_virtchnl.h b/drivers/net/ethernet/intel/i40e/i40e_virtchnl.h
index a7ab463b44746a5f74f6d7339b060df9c235c4be..0f8d4156f8b10796e962bbd85aae54de75b08b69 100644 (file)
--- a/drivers/net/ethernet/intel/i40e/i40e_virtchnl.h
+++ b/drivers/net/ethernet/intel/i40e/i40e_virtchnl.h
@@ -152,6 +152,7 @@ struct i40e_virtchnl_vsi_resource {
 #define I40E_VIRTCHNL_VF_OFFLOAD_RSS_AQ                0x00000008
 #define I40E_VIRTCHNL_VF_OFFLOAD_RSS_REG       0x00000010
 #define I40E_VIRTCHNL_VF_OFFLOAD_VLAN          0x00010000
+#define I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING    0x00020000
 
 struct i40e_virtchnl_vf_resource {
        u16 num_vsis;

diff --git a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c
index ca7a568f28091b5b36276b4561f56a709b0ef8a4..d99c116032f368cb25cd40e1e63bf2ab240780c0 100644 (file)
--- a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c
@@ -335,6 +335,18 @@ static void i40e_config_irq_link_list(struct i40e_vf *vf, u16 vsi_id,
                wr32(hw, reg_idx, reg);
        }
 
+       /* if the vf is running in polling mode and using interrupt zero,
+        * need to disable auto-mask on enabling zero interrupt for VFs.
+        */
+       if ((vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING) &&
+           (vector_id == 0)) {
+               reg = rd32(hw, I40E_GLINT_CTL);
+               if (!(reg & I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK)) {
+                       reg |= I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK;
+                       wr32(hw, I40E_GLINT_CTL, reg);
+               }
+       }
+
 irq_list_done:
        i40e_flush(hw);
 }

diff --git a/drivers/net/ethernet/intel/i40evf/i40e_virtchnl.h b/drivers/net/ethernet/intel/i40evf/i40e_virtchnl.h
index 1e89dea0d52925e0c18bab22da4266594da02d36..e6db20e8a395b8576175c1b2c7c3398e723d9d73 100644 (file)
--- a/drivers/net/ethernet/intel/i40evf/i40e_virtchnl.h
+++ b/drivers/net/ethernet/intel/i40evf/i40e_virtchnl.h
@@ -152,6 +152,7 @@ struct i40e_virtchnl_vsi_resource {
 #define I40E_VIRTCHNL_VF_OFFLOAD_RSS_AQ                0x00000008
 #define I40E_VIRTCHNL_VF_OFFLOAD_RSS_REG       0x00000010
 #define I40E_VIRTCHNL_VF_OFFLOAD_VLAN          0x00010000
+#define I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING    0x00020000
 
 struct i40e_virtchnl_vf_resource {
        u16 num_vsis;