Merge tag 'gemini-v4.13-dts-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linus...

This is a first set of Gemini DTS patches for the v4.13 cycle.

This adds the reset and clock lines to the Gemini core DTS SoC.

These bindings have been ACKed by the DT maintainer Rob.

The reset driver is going to be merged by the reset maintainer.
The clock driver is going to be merged by the clock maintainers.
Each of these have their macro defines coming with them, split
off as separate patches.

A post-rc1 patch will be sumbitted for switching the numerical
values to the defined macros in line with the ARM SoC DT header
merge strategy.

* tag 'gemini-v4.13-dts-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
  ARM: dts: Add clocks to the Gemini SoC
  ARM: dts: Add the Gemini reset controller
  dt-bindings: Augment Gemini for clocks, resets

Signed-off-by: Olof Johansson <olof@lixom.net>

diff --git a/Documentation/devicetree/bindings/arm/gemini.txt b/Documentation/devicetree/bindings/arm/gemini.txt
index 0041eb031116af2ed8e306ffa6d30eedfc7a4aca..55bf7ce96c4407d11a60210eb4e3644e7f041cb2 100644 (file)
--- a/Documentation/devicetree/bindings/arm/gemini.txt
+++ b/Documentation/devicetree/bindings/arm/gemini.txt
@@ -24,6 +24,19 @@ Required nodes:
   global control registers, with the compatible string
   "cortina,gemini-syscon", "syscon";
 
+  Required properties on the syscon:
+  - reg: syscon register location and size.
+  - #clock-cells: should be set to <1> - the system controller is also a
+                  clock provider.
+  - #reset-cells: should be set to <1> - the system controller is also a
+                  reset line provider.
+
+  The clock sources have shorthand defines in the include file:
+  <dt-bindings/clock/cortina,gemini-clock.h>
+
+  The reset lines have shorthand defines in the include file:
+  <dt-bindings/reset/cortina,gemini-reset.h>
+
 - timer: the soc bus node must have a timer node pointing to the SoC timer
   block, with the compatible string "cortina,gemini-timer"
   See: clocksource/cortina,gemini-timer.txt
@@ -56,12 +69,15 @@ Example:
                syscon: syscon@40000000 {
                        compatible = "cortina,gemini-syscon", "syscon";
                        reg = <0x40000000 0x1000>;
+                       #clock-cells = <1>;
+                       #reset-cells = <1>;
                };
 
                uart0: serial@42000000 {
                        compatible = "ns16550a";
                        reg = <0x42000000 0x100>;
-                       clock-frequency = <48000000>;
+                       resets = <&syscon GEMINI_RESET_UART>;
+                       clocks = <&syscon GEMINI_CLK_UART>;
                        interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
                        reg-shift = <2>;
                };
@@ -73,12 +89,18 @@ Example:
                        interrupts = <14 IRQ_TYPE_EDGE_FALLING>, /* Timer 1 */
                                     <15 IRQ_TYPE_EDGE_FALLING>, /* Timer 2 */
                                     <16 IRQ_TYPE_EDGE_FALLING>; /* Timer 3 */
+                       resets = <&syscon GEMINI_RESET_TIMER>;
+                       /* APB clock or RTC clock */
+                       clocks = <&syscon GEMINI_CLK_APB>,
+                                <&syscon GEMINI_CLK_RTC>;
+                       clock-names = "PCLK", "EXTCLK";
                        syscon = <&syscon>;
                };
 
                intcon: interrupt-controller@48000000 {
                        compatible = "cortina,gemini-interrupt-controller";
                        reg = <0x48000000 0x1000>;
+                       resets = <&syscon GEMINI_RESET_INTCON0>;
                        interrupt-controller;
                        #interrupt-cells = <2>;
                };

diff --git a/arch/arm/boot/dts/gemini.dtsi b/arch/arm/boot/dts/gemini.dtsi
index b8d011bdcc76af5fb3f1843bf876f10956b35294..80abf84f8a8084e89342a3cf8d2c5b9f5cf23d43 100644 (file)
--- a/arch/arm/boot/dts/gemini.dtsi
+++ b/arch/arm/boot/dts/gemini.dtsi
@@ -25,8 +25,11 @@
                };
 
                syscon: syscon@40000000 {
-                       compatible = "cortina,gemini-syscon", "syscon", "simple-mfd";
+                       compatible = "cortina,gemini-syscon",
+                                    "syscon", "simple-mfd";
                        reg = <0x40000000 0x1000>;
+                       #clock-cells = <1>;
+                       #reset-cells = <1>;
 
                        syscon-reboot {
                                compatible = "syscon-reboot";
@@ -42,23 +45,30 @@
                        compatible = "cortina,gemini-watchdog";
                        reg = <0x41000000 0x1000>;
                        interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
+                       resets = <&syscon 23>;
+                       clocks = <&syscon 2>;
                };
 
                uart0: serial@42000000 {
                        compatible = "ns16550a";
                        reg = <0x42000000 0x100>;
-                       clock-frequency = <48000000>;
+                       resets = <&syscon 18>;
+                       clocks = <&syscon 6>;
                        interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
                        reg-shift = <2>;
                };
 
                timer@43000000 {
-                       compatible = "cortina,gemini-timer";
+                       compatible = "faraday,fttmr010";
                        reg = <0x43000000 0x1000>;
                        interrupt-parent = <&intcon>;
                        interrupts = <14 IRQ_TYPE_EDGE_FALLING>, /* Timer 1 */
                                     <15 IRQ_TYPE_EDGE_FALLING>, /* Timer 2 */
                                     <16 IRQ_TYPE_EDGE_FALLING>; /* Timer 3 */
+                       resets = <&syscon 17>;
+                       /* APB clock or RTC clock */
+                       clocks = <&syscon 2>, <&syscon 0>;
+                       clock-names = "PCLK", "EXTCLK";
                        syscon = <&syscon>;
                };
 
@@ -66,11 +76,15 @@
                        compatible = "cortina,gemini-rtc";
                        reg = <0x45000000 0x100>;
                        interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
+                       resets = <&syscon 16>;
+                       clocks = <&syscon 2>, <&syscon 0>;
+                       clock-names = "PCLK", "EXTCLK";
                };
 
                intcon: interrupt-controller@48000000 {
                        compatible = "faraday,ftintc010";
                        reg = <0x48000000 0x1000>;
+                       resets = <&syscon 14>;
                        interrupt-controller;
                        #interrupt-cells = <2>;
                };
@@ -85,6 +99,8 @@
                        compatible = "cortina,gemini-gpio", "faraday,ftgpio010";
                        reg = <0x4d000000 0x100>;
                        interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
+                       resets = <&syscon 20>;
+                       clocks = <&syscon 2>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        interrupt-controller;
@@ -95,6 +111,8 @@
                        compatible = "cortina,gemini-gpio", "faraday,ftgpio010";
                        reg = <0x4e000000 0x100>;
                        interrupts = <23 IRQ_TYPE_LEVEL_HIGH>;
+                       resets = <&syscon 21>;
+                       clocks = <&syscon 2>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        interrupt-controller;
@@ -105,6 +123,8 @@
                        compatible = "cortina,gemini-gpio", "faraday,ftgpio010";
                        reg = <0x4f000000 0x100>;
                        interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
+                       resets = <&syscon 22>;
+                       clocks = <&syscon 2>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        interrupt-controller;
@@ -118,6 +138,9 @@
                         * to configure the host bridge.
                         */
                        reg = <0x50000000 0x100>;
+                       resets = <&syscon 7>;
+                       clocks = <&syscon 15>, <&syscon 4>;
+                       clock-names = "PCLK", "PCICLK";
                        #address-cells = <3>;
                        #size-cells = <2>;
                        #interrupt-cells = <1>;