]> git.proxmox.com Git - mirror_ubuntu-disco-kernel.git/commitdiff
drm/amdgpu: fix vm pte pde flags to 64-bit for sdma (v3)
authorJunwei Zhang <Jerry.Zhang@amd.com>
Tue, 28 Mar 2017 08:52:07 +0000 (16:52 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 30 Mar 2017 03:55:50 +0000 (23:55 -0400)
v2: fix for all sdma engines
v3: squash in fix for SI/CI

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/cik_sdma.c
drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
drivers/gpu/drm/amd/amdgpu/si_dma.c

index 0b62764caa283a5d62d8cd7ca341edca7be36c73..c216e16826c99df35e1ab22c9c14a97144fff9ad 100644 (file)
@@ -755,8 +755,8 @@ static void cik_sdma_vm_set_pte_pde(struct amdgpu_ib *ib, uint64_t pe,
        ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_GENERATE_PTE_PDE, 0, 0);
        ib->ptr[ib->length_dw++] = lower_32_bits(pe); /* dst addr */
        ib->ptr[ib->length_dw++] = upper_32_bits(pe);
-       ib->ptr[ib->length_dw++] = flags; /* mask */
-       ib->ptr[ib->length_dw++] = 0;
+       ib->ptr[ib->length_dw++] = lower_32_bits(flags); /* mask */
+       ib->ptr[ib->length_dw++] = upper_32_bits(flags);
        ib->ptr[ib->length_dw++] = lower_32_bits(addr); /* value */
        ib->ptr[ib->length_dw++] = upper_32_bits(addr);
        ib->ptr[ib->length_dw++] = incr; /* increment size */
index 182de5dc20815f47de8d2756a0d38f832fda9824..f2d0710258cb272552ed48f41d72ffb13d355f3d 100644 (file)
@@ -804,8 +804,8 @@ static void sdma_v2_4_vm_set_pte_pde(struct amdgpu_ib *ib, uint64_t pe,
        ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_GEN_PTEPDE);
        ib->ptr[ib->length_dw++] = lower_32_bits(pe); /* dst addr */
        ib->ptr[ib->length_dw++] = upper_32_bits(pe);
-       ib->ptr[ib->length_dw++] = flags; /* mask */
-       ib->ptr[ib->length_dw++] = 0;
+       ib->ptr[ib->length_dw++] = lower_32_bits(flags); /* mask */
+       ib->ptr[ib->length_dw++] = upper_32_bits(flags);
        ib->ptr[ib->length_dw++] = lower_32_bits(addr); /* value */
        ib->ptr[ib->length_dw++] = upper_32_bits(addr);
        ib->ptr[ib->length_dw++] = incr; /* increment size */
index 5be84df27cad8c2bad090b027da94248ac35d3db..a69e5d4e1d2ac0d5cdf2180d71550ad4ee5c4b8e 100644 (file)
@@ -1013,8 +1013,8 @@ static void sdma_v3_0_vm_set_pte_pde(struct amdgpu_ib *ib, uint64_t pe,
        ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_GEN_PTEPDE);
        ib->ptr[ib->length_dw++] = lower_32_bits(pe); /* dst addr */
        ib->ptr[ib->length_dw++] = upper_32_bits(pe);
-       ib->ptr[ib->length_dw++] = flags; /* mask */
-       ib->ptr[ib->length_dw++] = 0;
+       ib->ptr[ib->length_dw++] = lower_32_bits(flags); /* mask */
+       ib->ptr[ib->length_dw++] = upper_32_bits(flags);
        ib->ptr[ib->length_dw++] = lower_32_bits(addr); /* value */
        ib->ptr[ib->length_dw++] = upper_32_bits(addr);
        ib->ptr[ib->length_dw++] = incr; /* increment size */
index bc19e5ebdb9077fc13fe6bb00837df2350e3a6c8..2dd2b20d727eeff86738e4cb1a83ef2d06ef951f 100644 (file)
@@ -968,8 +968,8 @@ static void sdma_v4_0_vm_set_pte_pde(struct amdgpu_ib *ib,
        ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_PTEPDE);
        ib->ptr[ib->length_dw++] = lower_32_bits(pe); /* dst addr */
        ib->ptr[ib->length_dw++] = upper_32_bits(pe);
-       ib->ptr[ib->length_dw++] = flags; /* mask */
-       ib->ptr[ib->length_dw++] = 0;
+       ib->ptr[ib->length_dw++] = lower_32_bits(flags); /* mask */
+       ib->ptr[ib->length_dw++] = upper_32_bits(flags);
        ib->ptr[ib->length_dw++] = lower_32_bits(addr); /* value */
        ib->ptr[ib->length_dw++] = upper_32_bits(addr);
        ib->ptr[ib->length_dw++] = incr; /* increment size */
index a6862b185bbf030e69de2fcea00aae0a3f3a09e5..112969f3301a9fc578cd49ba660ec85942ae4f1b 100644 (file)
@@ -417,8 +417,8 @@ static void si_dma_vm_set_pte_pde(struct amdgpu_ib *ib,
                ib->ptr[ib->length_dw++] = DMA_PTE_PDE_PACKET(ndw);
                ib->ptr[ib->length_dw++] = pe; /* dst addr */
                ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff;
-               ib->ptr[ib->length_dw++] = flags; /* mask */
-               ib->ptr[ib->length_dw++] = 0;
+               ib->ptr[ib->length_dw++] = lower_32_bits(flags); /* mask */
+               ib->ptr[ib->length_dw++] = upper_32_bits(flags);
                ib->ptr[ib->length_dw++] = value; /* value */
                ib->ptr[ib->length_dw++] = upper_32_bits(value);
                ib->ptr[ib->length_dw++] = incr; /* increment size */