#define LOAD_DMCU_FW 1
#define LOAD_PHY_FW 2
+
+enum dmucb_trace_code {
+ DMCUB__UNKNOWN,
+ DMCUB__MAIN_BEGIN,
+ DMCUB__PHY_INIT_BEGIN,
+ DMCUB__PHY_FW_SRAM_LOAD_BEGIN,
+ DMCUB__PHY_FW_SRAM_LOAD_END,
+ DMCUB__PHY_INIT_POLL_DONE,
+ DMCUB__PHY_INIT_END,
+ DMCUB__DMCU_ERAM_LOAD_BEGIN,
+ DMCUB__DMCU_ERAM_LOAD_END,
+ DMCUB__DMCU_ISR_LOAD_BEGIN,
+ DMCUB__DMCU_ISR_LOAD_END,
+ DMCUB__MAIN_IDLE,
+ DMCUB__PERF_TRACE,
+};
+
struct dmcub_trace_buf_entry {
- uint32_t trace_code;
+ enum dmucb_trace_code trace_code;
uint32_t tick_count;
uint32_t param0;
uint32_t param1;
#define TRACE_BUF_SIZE (1024) //1 kB
#define PERF_TRACE_MAX_ENTRY ((TRACE_BUF_SIZE - 8)/sizeof(struct dmcub_trace_buf_entry))
+
struct dmcub_trace_buf {
uint32_t entry_count;
uint32_t clk_freq;
};
-
#endif /* _DMUB_TRACE_BUFFER_H_ */
#include "../inc/dmub_srv.h"
#include "dmub_dcn20.h"
#include "dmub_dcn21.h"
+#include "dmub_trace_buffer.h"
+#include "os_types.h"
/*
* Note: the DMUB service is standalone. No additional headers should be
* added below or above this line unless they reside within the DMUB
/* Mailbox size */
#define DMUB_MAILBOX_SIZE (DMUB_RB_SIZE)
-/* Tracebuffer size */
-#define DMUB_TRACEBUFF_SIZE (1024) //1kB buffer
/* Number of windows in use. */
#define DMUB_NUM_WINDOWS (DMUB_WINDOW_5_TRACEBUFF + 1)
#define DMUB_CW0_BASE (0x60000000)
#define DMUB_CW1_BASE (0x61000000)
+#define DMUB_CW3_BASE (0x63000000)
#define DMUB_CW5_BASE (0x65000000)
static inline uint32_t dmub_align(uint32_t val, uint32_t factor)
mail->top = mail->base + DMUB_MAILBOX_SIZE;
trace_buff->base = dmub_align(mail->top, 256);
- trace_buff->top = trace_buff->base + DMUB_TRACEBUFF_SIZE;
+ trace_buff->top = trace_buff->base + TRACE_BUF_SIZE;
out->fb_size = dmub_align(trace_buff->top, 4096);
cw2.region.top = cw2.region.base + data_fb->size;
cw3.offset.quad_part = bios_fb->gpu_addr;
- cw3.region.base = DMUB_CW1_BASE + stack_fb->size;
+ cw3.region.base = DMUB_CW3_BASE;
cw3.region.top = cw3.region.base + bios_fb->size;
cw4.offset.quad_part = mail_fb->gpu_addr;
enum dmub_status dmub_srv_wait_for_phy_init(struct dmub_srv *dmub,
uint32_t timeout_us)
{
- uint32_t i;
+ uint32_t i = 0;
if (!dmub->hw_init || !dmub->hw_funcs.is_phy_init)
return DMUB_STATUS_INVALID;
- for (i = 0; i <= timeout_us; i += 10) {
+/* for (i = 0; i <= timeout_us; i += 10) {
if (dmub->hw_funcs.is_phy_init(dmub))
return DMUB_STATUS_OK;
udelay(10);
+ }*/
+ while (!dmub->hw_funcs.is_phy_init(dmub)) {
+ ASSERT(i <= timeout_us);
+ i += 10;
+ udelay(10);
}
- return DMUB_STATUS_TIMEOUT;
+ return DMUB_STATUS_OK;
}
enum dmub_status dmub_srv_wait_for_idle(struct dmub_srv *dmub,