]> git.proxmox.com Git - mirror_ubuntu-disco-kernel.git/commitdiff
MIPS, Perf-events: Use unsigned delta for right shift in event update
authorDeng-Cheng Zhu <dengcheng.zhu@gmail.com>
Fri, 21 Jan 2011 08:19:21 +0000 (16:19 +0800)
committerRalf Baechle <ralf@linux-mips.org>
Mon, 14 Mar 2011 20:07:27 +0000 (21:07 +0100)
Leverage the commit for ARM by Will Deacon:

446a5a8b1eb91a6990e5c8fe29f14e7a95b69132
    ARM: 6205/1: perf: ensure counter delta is treated as unsigned

    Hardware performance counters on ARM are 32-bits wide but atomic64_t
    variables are used to represent counter data in the hw_perf_event structure.

    The armpmu_event_update function right-shifts a signed 64-bit delta variable
    and adds the result to the event count. This can lead to shifting in sign-bits
    if the MSB of the 32-bit counter value is set. This results in perf output
    such as:

     Performance counter stats for 'sleep 20':

     18446744073460670464  cycles             <-- 0xFFFFFFFFF12A6000
            7783773  instructions             #      0.000 IPC
                465  context-switches
                161  page-faults
            1172393  branches

       20.154242147  seconds time elapsed

    This patch ensures that the delta value is treated as unsigned so that the
    right shift sets the upper bits to zero.

Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
To: a.p.zijlstra@chello.nl
To: fweisbec@gmail.com
To: will.deacon@arm.com
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: wuzhangjin@gmail.com
Cc: paulus@samba.org
Cc: mingo@elte.hu
Cc: acme@redhat.com
Cc: matt@console-pimps.org
Cc: sshtylyov@mvista.com
Patchwork: http://patchwork.linux-mips.org/patch/2015/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/kernel/perf_event.c

index 8f7d2f84d09542b103adc406de0313e304b2f849..a8244854d3dc623f99a4a4d1a2de0d0950153459 100644 (file)
@@ -169,7 +169,7 @@ static void mipspmu_event_update(struct perf_event *event,
        unsigned long flags;
        int shift = 64 - TOTAL_BITS;
        s64 prev_raw_count, new_raw_count;
-       s64 delta;
+       u64 delta;
 
 again:
        prev_raw_count = local64_read(&hwc->prev_count);