KVM: nVMX: Drop obsolete (and pointless) pdptrs_changed() check

Remove the pdptrs_changed() check when loading L2's CR3.  The set of
available registers is always reset when switching VMCSes (see commit
e5d03de5937e, "KVM: nVMX: Reset register cache (available and dirty
masks) on VMCS switch"), thus the "are PDPTRs available" check will
always fail.  And even if it didn't fail, reading guest memory to check
the PDPTRs is just as expensive as reading guest memory to load 'em.

Signed-off-by: Sean Christopherson <seanjc@google.com>
Message-Id: <20210607090203.133058-2-mlevitsk@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c
index e77b8ee28df876fbea5c77927ab8fdf622ad53f8..47f4aa609778859113fec1adee73cf9cfef1c36c 100644 (file)
--- a/arch/x86/kvm/vmx/nested.c
+++ b/arch/x86/kvm/vmx/nested.c
@@ -1118,11 +1118,9 @@ static int nested_vmx_load_cr3(struct kvm_vcpu *vcpu, unsigned long cr3, bool ne
         * must not be dereferenced.
         */
        if (!nested_ept && is_pae_paging(vcpu) &&
-           (cr3 != kvm_read_cr3(vcpu) || pdptrs_changed(vcpu))) {
-               if (CC(!load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))) {
-                       *entry_failure_code = ENTRY_FAIL_PDPTE;
-                       return -EINVAL;
-               }
+           CC(!load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))) {
+               *entry_failure_code = ENTRY_FAIL_PDPTE;
+               return -EINVAL;
        }
 
        /*