* One-hundred-twenty-seven 32 KiW Main Blocks (8128 Ki b)
*/
static struct mtd_partition badge4_partitions[] = {
- {
- .name = "BLOB boot loader",
- .offset = 0,
- .size = 0x0000A000
- }, {
- .name = "params",
- .offset = MTDPART_OFS_APPEND,
- .size = 0x00006000
- }, {
- .name = "root",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL
- }
+ {
+ .name = "BLOB boot loader",
+ .offset = 0,
+ .size = 0x0000A000
+ }, {
+ .name = "params",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 0x00006000
+ }, {
+ .name = "root",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL
+ }
};
static struct flash_platform_data badge4_flash_data = {
static int __init five_v_on_setup(char *ignore)
{
- five_v_on = 1;
+ five_v_on = 1;
return 1;
}
__setup("five_v_on", five_v_on_setup);
GPCR = BADGE4_GPIO_TESTPT_J7;
GPDR |= BADGE4_GPIO_TESTPT_J7;
- /* 5V supply rail. */
- GPCR = BADGE4_GPIO_PCMEN5V; /* initially off */
- GPDR |= BADGE4_GPIO_PCMEN5V;
+ /* 5V supply rail. */
+ GPCR = BADGE4_GPIO_PCMEN5V; /* initially off */
+ GPDR |= BADGE4_GPIO_PCMEN5V;
/* CPLD sdram type inputs; set up by blob */
//GPDR |= (BADGE4_GPIO_SDTYP1 | BADGE4_GPIO_SDTYP0);
printk(KERN_DEBUG __FILE__ ": SDRAM CPLD typ1=%d typ0=%d\n",
- !!(GPLR & BADGE4_GPIO_SDTYP1),
- !!(GPLR & BADGE4_GPIO_SDTYP0));
+ !!(GPLR & BADGE4_GPIO_SDTYP1),
+ !!(GPLR & BADGE4_GPIO_SDTYP0));
/* SA1111 reset pin; set up by blob */
//GPSR = BADGE4_GPIO_SA1111_NRST;
ret = badge4_sa1111_init();
if (ret < 0)
printk(KERN_ERR
- "%s: SA-1111 initialization failed (%d)\n",
- __func__, ret);
+ "%s: SA-1111 initialization failed (%d)\n",
+ __func__, ret);
/* maybe turn on 5v0 from the start */
static struct map_desc badge4_io_desc[] __initdata = {
- { /* SRAM bank 1 */
+ { /* SRAM bank 1 */
.virtual = 0xf1000000,
.pfn = __phys_to_pfn(0x08000000),
.length = 0x00100000,
static const unsigned short cclk_frequency_100khz[NR_FREQS] = {
590, /* 59.0 MHz */
737, /* 73.7 MHz */
- 885, /* 88.5 MHz */
+ 885, /* 88.5 MHz */
1032, /* 103.2 MHz */
1180, /* 118.0 MHz */
1327, /* 132.7 MHz */
1917, /* 191.7 MHz */
2064, /* 206.4 MHz */
2212, /* 221.2 MHz */
- 2359, /* 235.9 MHz */
- 2507, /* 250.7 MHz */
- 2654, /* 265.4 MHz */
- 2802 /* 280.2 MHz */
+ 2359, /* 235.9 MHz */
+ 2507, /* 250.7 MHz */
+ 2654, /* 265.4 MHz */
+ 2802 /* 280.2 MHz */
};
#if defined(CONFIG_CPU_FREQ_SA1100) || defined(CONFIG_CPU_FREQ_SA1110)
#else
/*
* We still need to provide this so building without cpufreq works.
- */
+ */
unsigned int cpufreq_get(unsigned int cpu)
{
return cclk_frequency_100khz[PPCR & 0xf] * 100;
*/
static struct map_desc standard_io_desc[] __initdata = {
- { /* PCM */
+ { /* PCM */
.virtual = 0xf8000000,
.pfn = __phys_to_pfn(0x80000000),
.length = 0x00100000,
static struct resource smc91x_resources[] = {
[0] = {
- .start = PLEB_ETH0_P,
- .end = PLEB_ETH0_P | 0x03ffffff,
+ .start = PLEB_ETH0_P,
+ .end = PLEB_ETH0_P | 0x03ffffff,
.flags = IORESOURCE_MEM,
},
#if 0 /* Autoprobe instead, to get rising/falling edge characteristic right */
static struct mtd_partition pleb_partitions[] = {
{
.name = "blob",
- .offset = 0,
+ .offset = 0,
.size = 0x00020000,
}, {
.name = "kernel",
- .offset = MTDPART_OFS_APPEND,
+ .offset = MTDPART_OFS_APPEND,
.size = 0x000e0000,
}, {
.name = "rootfs",
- .offset = MTDPART_OFS_APPEND,
+ .offset = MTDPART_OFS_APPEND,
.size = 0x00300000,
}
};