net: macb: Fix SUBNS increment and increase resolution

BugLink: https://bugs.launchpad.net/bugs/1855787
commit 7ad342bc58cc5197cd2f12a3c30b3949528c6d83 upstream.

The subns increment register has 24 bits as follows:
RegBit[15:0] = Subns[23:8]; RegBit[31:24] = Subns[7:0]

Fix the same in the driver and increase sub ns resolution to the
best capable, 24 bits. This should be the case on all GEM versions
that this PTP driver supports.

Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Kamal Mostafa <kamal@canonical.com>
Signed-off-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com>

diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h
index c93f3a2dc6c1a3187040038bc0e859aa79d409bf..4c0bcfd1d2501d8e364bcc04851fd015fbe01f9a 100644 (file)
--- a/drivers/net/ethernet/cadence/macb.h
+++ b/drivers/net/ethernet/cadence/macb.h
@@ -457,7 +457,11 @@
 
 /* Bitfields in TISUBN */
 #define GEM_SUBNSINCR_OFFSET                   0
-#define GEM_SUBNSINCR_SIZE                     16
+#define GEM_SUBNSINCRL_OFFSET                  24
+#define GEM_SUBNSINCRL_SIZE                    8
+#define GEM_SUBNSINCRH_OFFSET                  0
+#define GEM_SUBNSINCRH_SIZE                    16
+#define GEM_SUBNSINCR_SIZE                     24
 
 /* Bitfields in TI */
 #define GEM_NSINCR_OFFSET                      0

diff --git a/drivers/net/ethernet/cadence/macb_ptp.c b/drivers/net/ethernet/cadence/macb_ptp.c
index dea762e222821c004388a288dd8adf86ad65d291..c456202649cb47f06f6d7fccab67089b5ec5d0a3 100755 (executable)
--- a/drivers/net/ethernet/cadence/macb_ptp.c
+++ b/drivers/net/ethernet/cadence/macb_ptp.c
@@ -115,7 +115,10 @@ static int gem_tsu_incr_set(struct macb *bp, struct tsu_incr *incr_spec)
         * to take effect.
         */
        spin_lock_irqsave(&bp->tsu_clk_lock, flags);
-       gem_writel(bp, TISUBN, GEM_BF(SUBNSINCR, incr_spec->sub_ns));
+       /* RegBit[15:0] = Subns[23:8]; RegBit[31:24] = Subns[7:0] */
+       gem_writel(bp, TISUBN, GEM_BF(SUBNSINCRL, incr_spec->sub_ns) |
+                  GEM_BF(SUBNSINCRH, (incr_spec->sub_ns >>
+                         GEM_SUBNSINCRL_SIZE)));
        gem_writel(bp, TI, GEM_BF(NSINCR, incr_spec->ns));
        spin_unlock_irqrestore(&bp->tsu_clk_lock, flags);