irqchip: mips-gic: Remove gic_set_dual_edge()

Remove the gic_set_dual_edge() function in favour of using the new
change_gic_dual() accessor function which provides equivalent
functionality. This also allows us to remove the gic_update_bits()
function which gic_set_dual_edge() was the last user of, along with the
GIC_INTR_OFS() & GIC_INTR_BIT() macros.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17031/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
index 14a1682f399ef8d55a97c76d2768a10f2ff32cf2..8aae9d20b82cb7ef532c3346569b6977d1fddcc5 100644 (file)
--- a/drivers/irqchip/irq-mips-gic.c
+++ b/drivers/irqchip/irq-mips-gic.c
@@ -81,24 +81,6 @@ static inline void gic_write(unsigned int reg, unsigned long val)
                return gic_write64(reg, (u64)val);
 }
 
-static inline void gic_update_bits(unsigned int reg, unsigned long mask,
-                                  unsigned long val)
-{
-       unsigned long regval;
-
-       regval = gic_read(reg);
-       regval &= ~mask;
-       regval |= val;
-       gic_write(reg, regval);
-}
-
-static inline void gic_set_dual_edge(unsigned int intr, unsigned int dual)
-{
-       gic_update_bits(GIC_REG(SHARED, GIC_SH_SET_DUAL) + GIC_INTR_OFS(intr),
-                       1ul << GIC_INTR_BIT(intr),
-                       (unsigned long)dual << GIC_INTR_BIT(intr));
-}
-
 static inline void gic_map_to_pin(unsigned int intr, unsigned int pin)
 {
        gic_write32(GIC_REG(SHARED, GIC_SH_INTR_MAP_TO_PIN_BASE) +
@@ -260,32 +242,32 @@ static int gic_set_type(struct irq_data *d, unsigned int type)
        case IRQ_TYPE_EDGE_FALLING:
                change_gic_pol(irq, GIC_POL_FALLING_EDGE);
                change_gic_trig(irq, GIC_TRIG_EDGE);
-               gic_set_dual_edge(irq, GIC_TRIG_DUAL_DISABLE);
+               change_gic_dual(irq, GIC_DUAL_SINGLE);
                is_edge = true;
                break;
        case IRQ_TYPE_EDGE_RISING:
                change_gic_pol(irq, GIC_POL_RISING_EDGE);
                change_gic_trig(irq, GIC_TRIG_EDGE);
-               gic_set_dual_edge(irq, GIC_TRIG_DUAL_DISABLE);
+               change_gic_dual(irq, GIC_DUAL_SINGLE);
                is_edge = true;
                break;
        case IRQ_TYPE_EDGE_BOTH:
                /* polarity is irrelevant in this case */
                change_gic_trig(irq, GIC_TRIG_EDGE);
-               gic_set_dual_edge(irq, GIC_TRIG_DUAL_ENABLE);
+               change_gic_dual(irq, GIC_DUAL_DUAL);
                is_edge = true;
                break;
        case IRQ_TYPE_LEVEL_LOW:
                change_gic_pol(irq, GIC_POL_ACTIVE_LOW);
                change_gic_trig(irq, GIC_TRIG_LEVEL);
-               gic_set_dual_edge(irq, GIC_TRIG_DUAL_DISABLE);
+               change_gic_dual(irq, GIC_DUAL_SINGLE);
                is_edge = false;
                break;
        case IRQ_TYPE_LEVEL_HIGH:
        default:
                change_gic_pol(irq, GIC_POL_ACTIVE_HIGH);
                change_gic_trig(irq, GIC_TRIG_LEVEL);
-               gic_set_dual_edge(irq, GIC_TRIG_DUAL_DISABLE);
+               change_gic_dual(irq, GIC_DUAL_SINGLE);
                is_edge = false;
                break;
        }

diff --git a/include/linux/irqchip/mips-gic.h b/include/linux/irqchip/mips-gic.h
index 2e9f0c43d4251165b9f358a3cbc13d669f379039..bd348fc9db184d746ad5f1872f3a5e5da9b17ec9 100644 (file)
--- a/include/linux/irqchip/mips-gic.h
+++ b/include/linux/irqchip/mips-gic.h
@@ -13,10 +13,6 @@
 
 #define GIC_MAX_INTRS                  256
 
-/* Constants */
-#define GIC_TRIG_DUAL_ENABLE           1
-#define GIC_TRIG_DUAL_DISABLE          0
-
 #define MSK(n) ((1 << (n)) - 1)
 
 /* Accessors */
@@ -38,19 +34,6 @@
 
 #define GIC_SH_REVISIONID_OFS          0x0020
 
-/* Convert an interrupt number to a byte offset/bit for multi-word registers */
-#define GIC_INTR_OFS(intr) ({                          \
-       unsigned bits = mips_cm_is64 ? 64 : 32;         \
-       unsigned reg_idx = (intr) / bits;               \
-       unsigned reg_width = bits / 8;                  \
-                                                       \
-       reg_idx * reg_width;                            \
-})
-#define GIC_INTR_BIT(intr)             ((intr) % (mips_cm_is64 ? 64 : 32))
-
-/* Dual edge triggering : Reset Value is always 0 */
-#define GIC_SH_SET_DUAL_OFS            0x0200
-
 /* Set/Clear corresponding bit in Edge Detect Register */
 #define GIC_SH_WEDGE_OFS               0x0280