The "Transmit Interrupts and Transmit Buffer Empty Bit" section of the ESCC
datasheet states the following about the STATUS_TXEMPTY bit: "After a hardware
reset (including a hardware reset by software), or a channel reset, this bit
is set to 1".
Update escc_reset() to set the STATUS_TXEMPTY bit in the R_STATUS register
on device reset as described which fixes a regression whereby the Sun PROM
checks this bit early on startup and gets stuck in an infinite loop if it is
not set.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <
20211118181835.18497-2-mark.cave-ayland@ilande.co.uk>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
cs->rregs[j] = 0;
cs->wregs[j] = 0;
}
+
+ /*
+ * ...but there is an exception. The "Transmit Interrupts and Transmit
+ * Buffer Empty Bit" section on page 50 of the ESCC datasheet says of
+ * the STATUS_TXEMPTY bit in R_STATUS: "After a hardware reset
+ * (including a hardware reset by software), or a channel reset, this
+ * bit is set to 1". The Sun PROM checks this bit early on startup and
+ * gets stuck in an infinite loop if it is not set.
+ */
+ cs->rregs[R_STATUS] |= STATUS_TXEMPTY;
+
escc_reset_chn(cs);
}
}