scsi: hisi_sas: update PHY linkrate after a controller reset

After the controller is reset, we currently may not honour the PHY max
linkrate set via sysfs, in that after a reset we always revert to max
linkrate of 12Gbps, ignoring the value set via sysfs.

This patch modifies to policy to set the programmed PHY linkrate,
honouring the max linkrate programmed via sysfs.

Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

diff --git a/drivers/scsi/hisi_sas/hisi_sas.h b/drivers/scsi/hisi_sas/hisi_sas.h
index 04a40c427a204f20ddf156be0c94259966f24b3c..44105389f2dfa9890d035b6933afb014a56c18c4 100644 (file)
--- a/drivers/scsi/hisi_sas/hisi_sas.h
+++ b/drivers/scsi/hisi_sas/hisi_sas.h
@@ -463,4 +463,5 @@ extern void hisi_sas_kill_tasklets(struct hisi_hba *hisi_hba);
 extern bool hisi_sas_notify_phy_event(struct hisi_sas_phy *phy,
                                enum hisi_sas_phy_event event);
 extern void hisi_sas_release_tasks(struct hisi_hba *hisi_hba);
+extern u8 hisi_sas_get_prog_phy_linkrate_mask(enum sas_linkrate max);
 #endif

diff --git a/drivers/scsi/hisi_sas/hisi_sas_main.c b/drivers/scsi/hisi_sas/hisi_sas_main.c
index 1f27f847b8b4db180bc5ee1aa0ce4602fb5d52a8..ff5b8d7de1d1da73db9904b390f6520b0de3aafd 100644 (file)
--- a/drivers/scsi/hisi_sas/hisi_sas_main.c
+++ b/drivers/scsi/hisi_sas/hisi_sas_main.c
@@ -135,6 +135,22 @@ int hisi_sas_get_ncq_tag(struct sas_task *task, u32 *tag)
 }
 EXPORT_SYMBOL_GPL(hisi_sas_get_ncq_tag);
 
+/*
+ * This function assumes linkrate mask fits in 8 bits, which it
+ * does for all HW versions supported.
+ */
+u8 hisi_sas_get_prog_phy_linkrate_mask(enum sas_linkrate max)
+{
+       u16 rate = 0;
+       int i;
+
+       max -= SAS_LINK_RATE_1_5_GBPS;
+       for (i = 0; i <= max; i++)
+               rate |= 1 << (i * 2);
+       return rate;
+}
+EXPORT_SYMBOL_GPL(hisi_sas_get_prog_phy_linkrate_mask);
+
 static struct hisi_hba *dev_to_hisi_hba(struct domain_device *device)
 {
        return device->port->ha->lldd_ha;

diff --git a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c
index 6dda6eb50918b2cf4bfd8a4f4db3342bd7cc9542..9e687319b8bc02c08edcd4e56b18cae039c84bc3 100644 (file)
--- a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c
+++ b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c
@@ -1216,7 +1216,22 @@ static void init_reg_v2_hw(struct hisi_hba *hisi_hba)
        }
 
        for (i = 0; i < hisi_hba->n_phy; i++) {
-               hisi_sas_phy_write32(hisi_hba, i, PROG_PHY_LINK_RATE, 0x855);
+               struct hisi_sas_phy *phy = &hisi_hba->phy[i];
+               struct asd_sas_phy *sas_phy = &phy->sas_phy;
+               u32 prog_phy_link_rate = 0x800;
+
+               if (!sas_phy->phy || (sas_phy->phy->maximum_linkrate <
+                               SAS_LINK_RATE_1_5_GBPS)) {
+                       prog_phy_link_rate = 0x855;
+               } else {
+                       enum sas_linkrate max = sas_phy->phy->maximum_linkrate;
+
+                       prog_phy_link_rate =
+                               hisi_sas_get_prog_phy_linkrate_mask(max) |
+                               0x800;
+               }
+               hisi_sas_phy_write32(hisi_hba, i, PROG_PHY_LINK_RATE,
+                       prog_phy_link_rate);
                hisi_sas_phy_write32(hisi_hba, i, SAS_PHY_CTRL, sas_phy_ctrl);
                hisi_sas_phy_write32(hisi_hba, i, SL_TOUT_CFG, 0x7d7d7d7d);
                hisi_sas_phy_write32(hisi_hba, i, SL_CONTROL, 0x0);
@@ -1585,13 +1600,10 @@ static enum sas_linkrate phy_get_max_linkrate_v2_hw(void)
 static void phy_set_linkrate_v2_hw(struct hisi_hba *hisi_hba, int phy_no,
                struct sas_phy_linkrates *r)
 {
-       u32 prog_phy_link_rate =
-               hisi_sas_phy_read32(hisi_hba, phy_no, PROG_PHY_LINK_RATE);
        struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
        struct asd_sas_phy *sas_phy = &phy->sas_phy;
-       int i;
        enum sas_linkrate min, max;
-       u32 rate_mask = 0;
+       u32 prog_phy_link_rate = 0x800;
 
        if (r->maximum_linkrate == SAS_LINK_RATE_UNKNOWN) {
                max = sas_phy->phy->maximum_linkrate;
@@ -1604,14 +1616,7 @@ static void phy_set_linkrate_v2_hw(struct hisi_hba *hisi_hba, int phy_no,
 
        sas_phy->phy->maximum_linkrate = max;
        sas_phy->phy->minimum_linkrate = min;
-
-       max -= SAS_LINK_RATE_1_5_GBPS;
-
-       for (i = 0; i <= max; i++)
-               rate_mask |= 1 << (i * 2);
-
-       prog_phy_link_rate &= ~0xff;
-       prog_phy_link_rate |= rate_mask;
+       prog_phy_link_rate |= hisi_sas_get_prog_phy_linkrate_mask(max);
 
        disable_phy_v2_hw(hisi_hba, phy_no);
        msleep(100);

diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c
index 5c0d9683630bc0f5d9ca54d18d233085736431e7..ffa3cea5ca8f06b7aa0bd3a2497a0c4e5247a1fb 100644 (file)
--- a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c
+++ b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c
@@ -429,7 +429,22 @@ static void init_reg_v3_hw(struct hisi_hba *hisi_hba)
        hisi_sas_write32(hisi_hba, HYPER_STREAM_ID_EN_CFG, 1);
 
        for (i = 0; i < hisi_hba->n_phy; i++) {
-               hisi_sas_phy_write32(hisi_hba, i, PROG_PHY_LINK_RATE, 0x855);
+               struct hisi_sas_phy *phy = &hisi_hba->phy[i];
+               struct asd_sas_phy *sas_phy = &phy->sas_phy;
+               u32 prog_phy_link_rate = 0x800;
+
+               if (!sas_phy->phy || (sas_phy->phy->maximum_linkrate <
+                               SAS_LINK_RATE_1_5_GBPS)) {
+                       prog_phy_link_rate = 0x855;
+               } else {
+                       enum sas_linkrate max = sas_phy->phy->maximum_linkrate;
+
+                       prog_phy_link_rate =
+                               hisi_sas_get_prog_phy_linkrate_mask(max) |
+                               0x800;
+               }
+               hisi_sas_phy_write32(hisi_hba, i, PROG_PHY_LINK_RATE,
+                       prog_phy_link_rate);
                hisi_sas_phy_write32(hisi_hba, i, SAS_RX_TRAIN_TIMER, 0x13e80);
                hisi_sas_phy_write32(hisi_hba, i, CHL_INT0, 0xffffffff);
                hisi_sas_phy_write32(hisi_hba, i, CHL_INT1, 0xffffffff);
@@ -1869,13 +1884,10 @@ static int hisi_sas_v3_init(struct hisi_hba *hisi_hba)
 static void phy_set_linkrate_v3_hw(struct hisi_hba *hisi_hba, int phy_no,
                struct sas_phy_linkrates *r)
 {
-       u32 prog_phy_link_rate =
-               hisi_sas_phy_read32(hisi_hba, phy_no, PROG_PHY_LINK_RATE);
        struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
        struct asd_sas_phy *sas_phy = &phy->sas_phy;
-       int i;
        enum sas_linkrate min, max;
-       u32 rate_mask = 0;
+       u32 prog_phy_link_rate = 0x800;
 
        if (r->maximum_linkrate == SAS_LINK_RATE_UNKNOWN) {
                max = sas_phy->phy->maximum_linkrate;
@@ -1888,14 +1900,7 @@ static void phy_set_linkrate_v3_hw(struct hisi_hba *hisi_hba, int phy_no,
 
        sas_phy->phy->maximum_linkrate = max;
        sas_phy->phy->minimum_linkrate = min;
-
-       max -= SAS_LINK_RATE_1_5_GBPS;
-
-       for (i = 0; i <= max; i++)
-               rate_mask |= 1 << (i * 2);
-
-       prog_phy_link_rate &= ~0xff;
-       prog_phy_link_rate |= rate_mask;
+       prog_phy_link_rate |= hisi_sas_get_prog_phy_linkrate_mask(max);
 
        disable_phy_v3_hw(hisi_hba, phy_no);
        msleep(100);