]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/commitdiff
clk: ti: dpll: add support for specifying max rate for DPLLs
authorTero Kristo <t-kristo@ti.com>
Wed, 16 Mar 2016 19:54:55 +0000 (21:54 +0200)
committerStephen Boyd <sboyd@codeaurora.org>
Sat, 16 Apr 2016 00:26:18 +0000 (17:26 -0700)
DPLLs typically have a maximum rate they can support, and this varies
from DPLL to DPLL. Add support of the maximum rate value to the DPLL
data struct, and also add check for this in the DPLL round_rate function.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/ti/clkt_dpll.c
include/linux/clk/ti.h

index 032c658a5f5ef6619108f66458f119ad924160a3..b919fdfe82560ed96cab55995e1f83e968d08edb 100644 (file)
@@ -301,6 +301,9 @@ long omap2_dpll_round_rate(struct clk_hw *hw, unsigned long target_rate,
 
        dd = clk->dpll_data;
 
+       if (dd->max_rate && target_rate > dd->max_rate)
+               target_rate = dd->max_rate;
+
        ref_rate = clk_hw_get_rate(dd->clk_ref);
        clk_name = clk_hw_get_name(hw);
        pr_debug("clock: %s: starting DPLL round_rate, target rate %lu\n",
index dc5164a6df2932f6c3f24e4287e46216f4c38c06..6110fe09ed18c289881e63d3b8e1ecb62dfb08c9 100644 (file)
@@ -37,6 +37,7 @@
  * @last_rounded_n: cache of the last N result of omap2_dpll_round_rate()
  * @min_divider: minimum valid non-bypass divider value (actual)
  * @max_divider: maximum valid non-bypass divider value (actual)
+ * @max_rate: maximum clock rate for the DPLL
  * @modes: possible values of @enable_mask
  * @autoidle_reg: register containing the DPLL autoidle mode bitfield
  * @idlest_reg: register containing the DPLL idle status bitfield
@@ -81,6 +82,7 @@ struct dpll_data {
        u8                      last_rounded_n;
        u8                      min_divider;
        u16                     max_divider;
+       unsigned long           max_rate;
        u8                      modes;
        void __iomem            *autoidle_reg;
        void __iomem            *idlest_reg;