Valid combinations are 1, 2, 3, 4, 8.
Default flag for internal sources should be set to 4 (active high).
- reg: Should contain AIC registers location and length
+- atmel,external-irqs: u32 array of external irqs.
Examples:
/*
compatible = "atmel,at91rm9200-aic";
interrupt-controller;
reg = <0xfffff000 0x200>;
+ atmel,external-irqs = <29 30 31>;
};
ramc0: ramc@ffffea00 {
compatible = "atmel,at91rm9200-aic";
interrupt-controller;
reg = <0xfffff000 0x200>;
+ atmel,external-irqs = <30 31>;
};
pmc: pmc@fffffc00 {
compatible = "atmel,at91rm9200-aic";
interrupt-controller;
reg = <0xfffff000 0x200>;
+ atmel,external-irqs = <31>;
};
ramc0: ramc@ffffe400 {
compatible = "atmel,at91rm9200-aic";
interrupt-controller;
reg = <0xfffff000 0x200>;
+ atmel,external-irqs = <31>;
};
ramc0: ramc@ffffe800 {
void __init at91sam9x5_initialize(void)
{
- at91_extern_irq = (1 << AT91SAM9X5_ID_IRQ0);
-
/* Register GPIO subsystem (using DT) */
at91_gpio_init(NULL, 0);
}
int __init at91_aic_of_init(struct device_node *node,
struct device_node *parent)
{
+ struct property *prop;
+ const __be32 *p;
+ u32 val;
+
at91_aic_base = of_iomap(node, 0);
at91_aic_np = node;
if (!at91_aic_domain)
panic("Unable to add AIC irq domain (DT)\n");
+ at91_extern_irq = 0;
+ of_property_for_each_u32(node, "atmel,external-irqs", prop, p, val) {
+ if (val > 31)
+ pr_warn("AIC: external irq %d > 31 skip it\n", val);
+ else
+ at91_extern_irq |= (1 << val);
+ }
+
irq_set_default_host(at91_aic_domain);
at91_aic_hw_init(NR_AIC_IRQS);