]> git.proxmox.com Git - mirror_ubuntu-eoan-kernel.git/commitdiff
ARM: at91: aic add dt support for external irqs
authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Mon, 9 Apr 2012 11:36:36 +0000 (19:36 +0800)
committerNicolas Ferre <nicolas.ferre@atmel.com>
Mon, 2 Jul 2012 12:26:58 +0000 (14:26 +0200)
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Documentation/devicetree/bindings/arm/atmel-aic.txt
arch/arm/boot/dts/at91sam9260.dtsi
arch/arm/boot/dts/at91sam9263.dtsi
arch/arm/boot/dts/at91sam9g45.dtsi
arch/arm/boot/dts/at91sam9x5.dtsi
arch/arm/mach-at91/at91sam9x5.c
arch/arm/mach-at91/irq.c

index aabca4f83402198c50893724a2d3dbcfb3d221d4..1953b0c1b7c5bc92b0c86c2cadf24382cf378840 100644 (file)
@@ -15,6 +15,7 @@ Required properties:
       Valid combinations are 1, 2, 3, 4, 8.
       Default flag for internal sources should be set to 4 (active high).
 - reg: Should contain AIC registers location and length
+- atmel,external-irqs: u32 array of external irqs.
 
 Examples:
        /*
index f449efc9825fd711d485b57318adf02b47e01f3e..f2c96430f9cb1d12639f0a4648772461d6c622c6 100644 (file)
@@ -56,6 +56,7 @@
                                compatible = "atmel,at91rm9200-aic";
                                interrupt-controller;
                                reg = <0xfffff000 0x200>;
+                               atmel,external-irqs = <29 30 31>;
                        };
 
                        ramc0: ramc@ffffea00 {
index 0209913a65a2001dafea2bacda1ce741fa227872..c803636ca9f5dcd917331865d89ee5116a96393f 100644 (file)
@@ -52,6 +52,7 @@
                                compatible = "atmel,at91rm9200-aic";
                                interrupt-controller;
                                reg = <0xfffff000 0x200>;
+                               atmel,external-irqs = <30 31>;
                        };
 
                        pmc: pmc@fffffc00 {
index 7dbccaf199f7e0844bdeb3ee8cf789d8543f0a6f..2d01ce2a023f79d8d818c206980878a92391e6a3 100644 (file)
@@ -57,6 +57,7 @@
                                compatible = "atmel,at91rm9200-aic";
                                interrupt-controller;
                                reg = <0xfffff000 0x200>;
+                               atmel,external-irqs = <31>;
                        };
 
                        ramc0: ramc@ffffe400 {
index 6b3ef4339ae7030eff85882a89f04d29ea346c21..6a0a0fbb6283672ab5547f114d219a2b9fd42a50 100644 (file)
@@ -55,6 +55,7 @@
                                compatible = "atmel,at91rm9200-aic";
                                interrupt-controller;
                                reg = <0xfffff000 0x200>;
+                               atmel,external-irqs = <31>;
                        };
 
                        ramc0: ramc@ffffe800 {
index 1b144b4d3ce19da1ef7a580d2bbde299100eaa5f..537710b689820abb74490d8e01ef23ee70315546 100644 (file)
@@ -312,8 +312,6 @@ static void __init at91sam9x5_map_io(void)
 
 void __init at91sam9x5_initialize(void)
 {
-       at91_extern_irq = (1 << AT91SAM9X5_ID_IRQ0);
-
        /* Register GPIO subsystem (using DT) */
        at91_gpio_init(NULL, 0);
 }
index 2d5d4c88a52732e0ed05c3f99a452eb7cc6ae119..df8605fd7bad2273b92a1526757dc795c78c2f78 100644 (file)
@@ -194,6 +194,10 @@ static struct irq_domain_ops at91_aic_irq_ops = {
 int __init at91_aic_of_init(struct device_node *node,
                                     struct device_node *parent)
 {
+       struct property *prop;
+       const __be32 *p;
+       u32 val;
+
        at91_aic_base = of_iomap(node, 0);
        at91_aic_np = node;
 
@@ -202,6 +206,14 @@ int __init at91_aic_of_init(struct device_node *node,
        if (!at91_aic_domain)
                panic("Unable to add AIC irq domain (DT)\n");
 
+       at91_extern_irq = 0;
+       of_property_for_each_u32(node, "atmel,external-irqs", prop, p, val) {
+               if (val > 31)
+                       pr_warn("AIC: external irq %d > 31 skip it\n", val);
+               else
+                       at91_extern_irq |= (1 << val);
+       }
+
        irq_set_default_host(at91_aic_domain);
 
        at91_aic_hw_init(NR_AIC_IRQS);