]> git.proxmox.com Git - mirror_ubuntu-kernels.git/commitdiff
drm/i915: Start using comparative INTEL_PCH_TYPE
authorRodrigo Vivi <rodrigo.vivi@intel.com>
Fri, 8 Mar 2019 21:43:00 +0000 (13:43 -0800)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Wed, 13 Mar 2019 20:00:30 +0000 (13:00 -0700)
In order to make it easier to bring up new platforms
without having to take care about all corner cases
that was previously taken care for previous platforms
we already use comparative INTEL_GEN statements.

Let's start doing the same with PCH.

The only caveats are:
 - less-than comparisons need to be avoided or done with
   attention and check > PCH_NONE as well.
 - It is not necessarily a chronological order, but a matter
   of south display compatibility/inheritance.

v2: Rebased on top of Jani's clean-up which removed the
    need for less-than comparison

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190308214300.25057-3-rodrigo.vivi@intel.com
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_irq.c
drivers/gpu/drm/i915/intel_cdclk.c
drivers/gpu/drm/i915/intel_dp.c
drivers/gpu/drm/i915/intel_panel.c

index 9ca048d52b0f759f4740a38a71196539972c2af8..0ed6e871f6097a18ea8cc007937a0917bd2b2855 100644 (file)
@@ -523,6 +523,12 @@ struct i915_psr {
        u16 su_x_granularity;
 };
 
+/*
+ * Sorted by south display engine compatibility.
+ * If the new PCH comes with a south display engine that is not
+ * inherited from the latest item, please do not add it to the
+ * end. Instead, add it right after its "parent" PCH.
+ */
 enum intel_pch {
        PCH_NOP = -1,   /* PCH without south display */
        PCH_NONE = 0,   /* No PCH present */
index 1f4e984ce42f87a501d52285418bf4a97fc1d36f..c823d2e768527d2062a13ac8abd59a5cfb630159 100644 (file)
@@ -2831,9 +2831,7 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
 
                        if (HAS_PCH_ICP(dev_priv))
                                icp_irq_handler(dev_priv, iir);
-                       else if (HAS_PCH_SPT(dev_priv) ||
-                                HAS_PCH_KBP(dev_priv) ||
-                                HAS_PCH_CNP(dev_priv))
+                       else if (INTEL_PCH_TYPE(dev_priv) >= PCH_SPT)
                                spt_irq_handler(dev_priv, iir);
                        else
                                cpt_irq_handler(dev_priv, iir);
@@ -4621,8 +4619,7 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
                dev->driver->disable_vblank = gen8_disable_vblank;
                if (IS_GEN9_LP(dev_priv))
                        dev_priv->display.hpd_irq_setup = bxt_hpd_irq_setup;
-               else if (HAS_PCH_SPT(dev_priv) || HAS_PCH_KBP(dev_priv) ||
-                        HAS_PCH_CNP(dev_priv))
+               else if (INTEL_PCH_TYPE(dev_priv) >= PCH_SPT)
                        dev_priv->display.hpd_irq_setup = spt_hpd_irq_setup;
                else
                        dev_priv->display.hpd_irq_setup = ilk_hpd_irq_setup;
index 7e5132772477e4ffa91cfa8fce7d98a3d0584e27..9d236e4ed26a5a17fe176d81f55951d6623b5dfe 100644 (file)
@@ -2723,7 +2723,7 @@ static int g4x_hrawclk(struct drm_i915_private *dev_priv)
  */
 void intel_update_rawclk(struct drm_i915_private *dev_priv)
 {
-       if (HAS_PCH_CNP(dev_priv) || HAS_PCH_ICP(dev_priv))
+       if (INTEL_PCH_TYPE(dev_priv) >= PCH_CNP)
                dev_priv->rawclk_freq = cnp_rawclk(dev_priv);
        else if (HAS_PCH_SPLIT(dev_priv))
                dev_priv->rawclk_freq = pch_rawclk(dev_priv);
index f40b3342d82acf9260940cede639b4fcd2549c8f..47857f96c3b13461da0ab78e7510ceeb52e7cf33 100644 (file)
@@ -951,8 +951,7 @@ static void intel_pps_get_registers(struct intel_dp *intel_dp,
        regs->pp_off = PP_OFF_DELAYS(pps_idx);
 
        /* Cycle delay moved from PP_DIVISOR to PP_CONTROL */
-       if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv) ||
-           HAS_PCH_ICP(dev_priv))
+       if (IS_GEN9_LP(dev_priv) || INTEL_PCH_TYPE(dev_priv) >= PCH_CNP)
                regs->pp_div = INVALID_MMIO_REG;
        else
                regs->pp_div = PP_DIVISOR(pps_idx);
index beca98d2b035b2a84f3425a674cfbb4a4966aa13..edd5540639b0e7aca4e0a3d28bcd5c529aa05c05 100644 (file)
@@ -1894,15 +1894,14 @@ intel_panel_init_backlight_funcs(struct intel_panel *panel)
                panel->backlight.set = bxt_set_backlight;
                panel->backlight.get = bxt_get_backlight;
                panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
-       } else if (HAS_PCH_CNP(dev_priv) || HAS_PCH_ICP(dev_priv)) {
+       } else if (INTEL_PCH_TYPE(dev_priv) >= PCH_CNP) {
                panel->backlight.setup = cnp_setup_backlight;
                panel->backlight.enable = cnp_enable_backlight;
                panel->backlight.disable = cnp_disable_backlight;
                panel->backlight.set = bxt_set_backlight;
                panel->backlight.get = bxt_get_backlight;
                panel->backlight.hz_to_pwm = cnp_hz_to_pwm;
-       } else if (HAS_PCH_LPT(dev_priv) || HAS_PCH_SPT(dev_priv) ||
-                  HAS_PCH_KBP(dev_priv)) {
+       } else if (INTEL_PCH_TYPE(dev_priv) >= PCH_LPT) {
                panel->backlight.setup = lpt_setup_backlight;
                panel->backlight.enable = lpt_enable_backlight;
                panel->backlight.disable = lpt_disable_backlight;