]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/commitdiff
arm64: capabilities: Move errata processing code
authorSuzuki K Poulose <suzuki.poulose@arm.com>
Thu, 24 Oct 2019 12:47:57 +0000 (14:47 +0200)
committerStefan Bader <stefan.bader@canonical.com>
Tue, 12 Nov 2019 18:04:45 +0000 (19:04 +0100)
BugLink: https://bugs.launchpad.net/bugs/1851876
[ Upstream commit 1e89baed5d50d2b8d9fd420830902570270703f1 ]

We have errata work around processing code in cpu_errata.c,
which calls back into helpers defined in cpufeature.c. Now
that we are going to make the handling of capabilities
generic, by adding the information to each capability,
move the errata work around specific processing code.
No functional changes.

Cc: Will Deacon <will.deacon@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Dave Martin <dave.martin@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Kamal Mostafa <kamal@canonical.com>
Signed-off-by: Khalid Elmously <khalid.elmously@canonical.com>
arch/arm64/include/asm/cpufeature.h
arch/arm64/kernel/cpu_errata.c
arch/arm64/kernel/cpufeature.c

index 04e18bb663d64b8be1d5d660fdaf992f1ec5890c..71506af122823f11057b72a66f27314d403e2900 100644 (file)
@@ -242,15 +242,8 @@ static inline bool id_aa64pfr0_sve(u64 pfr0)
 }
 
 void __init setup_cpu_features(void);
-
-void update_cpu_capabilities(const struct arm64_cpu_capabilities *caps,
-                           const char *info);
-void enable_cpu_capabilities(const struct arm64_cpu_capabilities *caps);
 void check_local_cpu_capabilities(void);
 
-void update_cpu_errata_workarounds(void);
-void __init enable_errata_workarounds(void);
-void verify_local_cpu_errata_workarounds(void);
 
 u64 read_sanitised_ftr_reg(u32 id);
 
index 3c2a68d766a2ea7cac0a09cd85d74f5617780622..f1885beb25887868c0035900c396973c6cb482a3 100644 (file)
@@ -621,36 +621,3 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
        {
        }
 };
-
-/*
- * The CPU Errata work arounds are detected and applied at boot time
- * and the related information is freed soon after. If the new CPU requires
- * an errata not detected at boot, fail this CPU.
- */
-void verify_local_cpu_errata_workarounds(void)
-{
-       const struct arm64_cpu_capabilities *caps = arm64_errata;
-
-       for (; caps->matches; caps++) {
-               if (cpus_have_cap(caps->capability)) {
-                       if (caps->cpu_enable)
-                               caps->cpu_enable(caps);
-               } else if (caps->matches(caps, SCOPE_LOCAL_CPU)) {
-                       pr_crit("CPU%d: Requires work around for %s, not detected"
-                                       " at boot time\n",
-                               smp_processor_id(),
-                               caps->desc ? : "an erratum");
-                       cpu_die_early();
-               }
-       }
-}
-
-void update_cpu_errata_workarounds(void)
-{
-       update_cpu_capabilities(arm64_errata, "enabling workaround for");
-}
-
-void __init enable_errata_workarounds(void)
-{
-       enable_cpu_capabilities(arm64_errata);
-}
index 72619448f52cba239948fe80be2d74801b3ca6a1..a4d42740c4cb78bddceb677b7498ec64b56ddd6a 100644 (file)
@@ -521,6 +521,9 @@ static void __init init_cpu_ftr_reg(u32 sys_reg, u64 new)
        reg->user_mask = user_mask;
 }
 
+extern const struct arm64_cpu_capabilities arm64_errata[];
+static void update_cpu_errata_workarounds(void);
+
 void __init init_cpu_features(struct cpuinfo_arm64 *info)
 {
        /* Before we start using the tables, make sure it is sorted */
@@ -1244,8 +1247,8 @@ static bool __this_cpu_has_cap(const struct arm64_cpu_capabilities *cap_array,
        return false;
 }
 
-void update_cpu_capabilities(const struct arm64_cpu_capabilities *caps,
-                           const char *info)
+static void update_cpu_capabilities(const struct arm64_cpu_capabilities *caps,
+                                   const char *info)
 {
        for (; caps->matches; caps++) {
                if (!caps->matches(caps, caps->def_scope))
@@ -1269,7 +1272,8 @@ static int __enable_cpu_capability(void *arg)
  * Run through the enabled capabilities and enable() it on all active
  * CPUs
  */
-void __init enable_cpu_capabilities(const struct arm64_cpu_capabilities *caps)
+static void __init
+enable_cpu_capabilities(const struct arm64_cpu_capabilities *caps)
 {
        for (; caps->matches; caps++) {
                unsigned int num = caps->capability;
@@ -1353,6 +1357,39 @@ static void verify_sve_features(void)
        /* Add checks on other ZCR bits here if necessary */
 }
 
+/*
+ * The CPU Errata work arounds are detected and applied at boot time
+ * and the related information is freed soon after. If the new CPU requires
+ * an errata not detected at boot, fail this CPU.
+ */
+static void verify_local_cpu_errata_workarounds(void)
+{
+       const struct arm64_cpu_capabilities *caps = arm64_errata;
+
+       for (; caps->matches; caps++) {
+               if (cpus_have_cap(caps->capability)) {
+                       if (caps->cpu_enable)
+                               caps->cpu_enable(caps);
+               } else if (caps->matches(caps, SCOPE_LOCAL_CPU)) {
+                       pr_crit("CPU%d: Requires work around for %s, not detected"
+                                       " at boot time\n",
+                               smp_processor_id(),
+                               caps->desc ? : "an erratum");
+                       cpu_die_early();
+               }
+       }
+}
+
+static void update_cpu_errata_workarounds(void)
+{
+       update_cpu_capabilities(arm64_errata, "enabling workaround for");
+}
+
+static void __init enable_errata_workarounds(void)
+{
+       enable_cpu_capabilities(arm64_errata);
+}
+
 /*
  * Run through the enabled system capabilities and enable() it on this CPU.
  * The capabilities were decided based on the available CPUs at the boot time.