fsl/qe: add bit description for SYNL register for GUMR

Add the bitmask for the two bit SYNL register according to the QUICK
Engine Reference Manual.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Cc: Zhao Qiang <qiang.zhao@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/include/soc/fsl/qe/qe.h b/include/soc/fsl/qe/qe.h
index 0cd4c11479b1f4c4385c294295fdea4a7d82daa1..226f915a68c28e5abf3e902e5b3b38c25f4eb41a 100644 (file)
--- a/include/soc/fsl/qe/qe.h
+++ b/include/soc/fsl/qe/qe.h
@@ -668,6 +668,10 @@ struct ucc_slow_pram {
 #define UCC_FAST_GUMR_CTSS     0x00800000
 #define UCC_FAST_GUMR_TXSY     0x00020000
 #define UCC_FAST_GUMR_RSYN     0x00010000
+#define UCC_FAST_GUMR_SYNL_MASK        0x0000C000
+#define UCC_FAST_GUMR_SYNL_16  0x0000C000
+#define UCC_FAST_GUMR_SYNL_8   0x00008000
+#define UCC_FAST_GUMR_SYNL_AUTO        0x00004000
 #define UCC_FAST_GUMR_RTSM     0x00002000
 #define UCC_FAST_GUMR_REVD     0x00000400
 #define UCC_FAST_GUMR_ENR      0x00000020