disable DPM UCLK and SOC DS on A0 secure board
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
if (smu->adev->pg_flags & AMD_PG_SUPPORT_VCN)
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_VCN_PG_BIT);
+ /* disable DPM UCLK and DS SOCCLK on navi10 A0 secure board */
+ if (is_asic_secure(smu)) {
+ /* only for navi10 A0 */
+ if ((adev->asic_type == CHIP_NAVI10) &&
+ (adev->rev_id == 0)) {
+ *(uint64_t *)feature_mask &=
+ ~FEATURE_MASK(FEATURE_DPM_UCLK_BIT);
+ *(uint64_t *)feature_mask &=
+ ~FEATURE_MASK(FEATURE_DS_SOCCLK_BIT);
+ }
+ }
+
return 0;
}