r8169: improve pci region handling

The region to be used is always the first of type IORESOURCE_MEM.
We can implement this rule directly w/o having to specify which
region is the first one per configuration entry.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c
index ccc57683ed1ba0616ecd937ded52ddfc5caeb03f..94e91d3c2233dc6dfa6b5cd293835a2b43ce7b32 100644 (file)
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
@@ -7974,7 +7974,6 @@ static const struct net_device_ops rtl_netdev_ops = {
 
 static const struct rtl_cfg_info {
        void (*hw_start)(struct rtl8169_private *tp);
-       unsigned int region;
        u16 event_slow;
        unsigned int has_gmii:1;
        const struct rtl_coalesce_info *coalesce_info;
@@ -7982,7 +7981,6 @@ static const struct rtl_cfg_info {
 } rtl_cfg_infos [] = {
        [RTL_CFG_0] = {
                .hw_start       = rtl_hw_start_8169,
-               .region         = 1,
                .event_slow     = SYSErr | LinkChg | RxOverflow | RxFIFOOver,
                .has_gmii       = 1,
                .coalesce_info  = rtl_coalesce_info_8169,
@@ -7990,7 +7988,6 @@ static const struct rtl_cfg_info {
        },
        [RTL_CFG_1] = {
                .hw_start       = rtl_hw_start_8168,
-               .region         = 2,
                .event_slow     = SYSErr | LinkChg | RxOverflow,
                .has_gmii       = 1,
                .coalesce_info  = rtl_coalesce_info_8168_8136,
@@ -7998,7 +7995,6 @@ static const struct rtl_cfg_info {
        },
        [RTL_CFG_2] = {
                .hw_start       = rtl_hw_start_8101,
-               .region         = 2,
                .event_slow     = SYSErr | LinkChg | RxOverflow | RxFIFOOver |
                                  PCSTimeout,
                .coalesce_info  = rtl_coalesce_info_8168_8136,
@@ -8098,11 +8094,10 @@ static void rtl_hw_initialize(struct rtl8169_private *tp)
 static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
 {
        const struct rtl_cfg_info *cfg = rtl_cfg_infos + ent->driver_data;
-       const unsigned int region = cfg->region;
        struct rtl8169_private *tp;
        struct mii_if_info *mii;
        struct net_device *dev;
-       int chipset, i;
+       int chipset, region, i;
        int rc;
 
        if (netif_msg_drv(&debug)) {
@@ -8144,11 +8139,10 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
        if (pcim_set_mwi(pdev) < 0)
                netif_info(tp, probe, dev, "Mem-Wr-Inval unavailable\n");
 
-       /* make sure PCI base addr 1 is MMIO */
-       if (!(pci_resource_flags(pdev, region) & IORESOURCE_MEM)) {
-               netif_err(tp, probe, dev,
-                         "region #%d not an MMIO resource, aborting\n",
-                         region);
+       /* use first MMIO region */
+       region = ffs(pci_select_bars(pdev, IORESOURCE_MEM)) - 1;
+       if (region < 0) {
+               netif_err(tp, probe, dev, "no MMIO resource found\n");
                return -ENODEV;
        }