The CM registers use native endianness, so using plain readl & writel
will produce incorrect results on big endian systems.
Reported-by: Jeffrey Deans <jeffrey.deans@imgtec.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6656/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
\
static inline u32 read_gcr_##name(void) \
{ \
- return readl(addr_gcr_##name()); \
+ return __raw_readl(addr_gcr_##name()); \
}
#define BUILD_CM__W(name, off) \
static inline void write_gcr_##name(u32 value) \
{ \
- writel(value, addr_gcr_##name()); \
+ __raw_writel(value, addr_gcr_##name()); \
}
#define BUILD_CM_RW(name, off) \