IRQ5_MARK,
};
+/* - MLB+ ------------------------------------------------------------------- */
+static const unsigned int mlb_3pin_pins[] = {
+ RCAR_GP_PIN(5, 23), RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25),
+};
+static const unsigned int mlb_3pin_mux[] = {
+ MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK,
+};
+
/* - MSIOF0 ----------------------------------------------------------------- */
static const unsigned int msiof0_clk_pins[] = {
/* SCK */
SH_PFC_PIN_GROUP(intc_ex_irq3),
SH_PFC_PIN_GROUP(intc_ex_irq4),
SH_PFC_PIN_GROUP(intc_ex_irq5),
+ SH_PFC_PIN_GROUP(mlb_3pin),
SH_PFC_PIN_GROUP(msiof0_clk),
SH_PFC_PIN_GROUP(msiof0_sync),
SH_PFC_PIN_GROUP(msiof0_ss1),
"intc_ex_irq5",
};
+static const char * const mlb_3pin_groups[] = {
+ "mlb_3pin",
+};
+
static const char * const msiof0_groups[] = {
"msiof0_clk",
"msiof0_sync",
SH_PFC_FUNCTION(i2c5),
SH_PFC_FUNCTION(i2c6),
SH_PFC_FUNCTION(intc_ex),
+ SH_PFC_FUNCTION(mlb_3pin),
SH_PFC_FUNCTION(msiof0),
SH_PFC_FUNCTION(msiof1),
SH_PFC_FUNCTION(msiof2),
IRQ5_MARK,
};
+#ifdef CONFIG_PINCTRL_PFC_R8A77951
+/* - MLB+ ------------------------------------------------------------------- */
+static const unsigned int mlb_3pin_pins[] = {
+ RCAR_GP_PIN(5, 23), RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25),
+};
+static const unsigned int mlb_3pin_mux[] = {
+ MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK,
+};
+#endif /* CONFIG_PINCTRL_PFC_R8A77951 */
+
/* - MSIOF0 ----------------------------------------------------------------- */
static const unsigned int msiof0_clk_pins[] = {
/* SCK */
static const struct {
struct sh_pfc_pin_group common[328];
#ifdef CONFIG_PINCTRL_PFC_R8A77951
- struct sh_pfc_pin_group automotive[30];
+ struct sh_pfc_pin_group automotive[31];
#endif
} pinmux_groups = {
.common = {
SH_PFC_PIN_GROUP(drif3_ctrl_b),
SH_PFC_PIN_GROUP(drif3_data0_b),
SH_PFC_PIN_GROUP(drif3_data1_b),
+ SH_PFC_PIN_GROUP(mlb_3pin),
}
#endif /* CONFIG_PINCTRL_PFC_R8A77951 */
};
"intc_ex_irq5",
};
+#ifdef CONFIG_PINCTRL_PFC_R8A77951
+static const char * const mlb_3pin_groups[] = {
+ "mlb_3pin",
+};
+#endif /* CONFIG_PINCTRL_PFC_R8A77951 */
+
static const char * const msiof0_groups[] = {
"msiof0_clk",
"msiof0_sync",
static const struct {
struct sh_pfc_function common[55];
#ifdef CONFIG_PINCTRL_PFC_R8A77951
- struct sh_pfc_function automotive[4];
+ struct sh_pfc_function automotive[5];
#endif
} pinmux_functions = {
.common = {
SH_PFC_FUNCTION(drif1),
SH_PFC_FUNCTION(drif2),
SH_PFC_FUNCTION(drif3),
+ SH_PFC_FUNCTION(mlb_3pin),
}
#endif /* CONFIG_PINCTRL_PFC_R8A77951 */
};
IRQ5_MARK,
};
+#if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961)
+/* - MLB+ ------------------------------------------------------------------- */
+static const unsigned int mlb_3pin_pins[] = {
+ RCAR_GP_PIN(5, 23), RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25),
+};
+static const unsigned int mlb_3pin_mux[] = {
+ MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK,
+};
+#endif /* CONFIG_PINCTRL_PFC_R8A77960 || CONFIG_PINCTRL_PFC_R8A77961 */
+
/* - MSIOF0 ----------------------------------------------------------------- */
static const unsigned int msiof0_clk_pins[] = {
/* SCK */
static const struct {
struct sh_pfc_pin_group common[324];
#if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961)
- struct sh_pfc_pin_group automotive[30];
+ struct sh_pfc_pin_group automotive[31];
#endif
} pinmux_groups = {
.common = {
SH_PFC_PIN_GROUP(drif3_ctrl_b),
SH_PFC_PIN_GROUP(drif3_data0_b),
SH_PFC_PIN_GROUP(drif3_data1_b),
+ SH_PFC_PIN_GROUP(mlb_3pin),
}
#endif /* CONFIG_PINCTRL_PFC_R8A77960 || CONFIG_PINCTRL_PFC_R8A77961 */
};
"intc_ex_irq5",
};
+#if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961)
+static const char * const mlb_3pin_groups[] = {
+ "mlb_3pin",
+};
+#endif /* CONFIG_PINCTRL_PFC_R8A77960 || CONFIG_PINCTRL_PFC_R8A77961 */
+
static const char * const msiof0_groups[] = {
"msiof0_clk",
"msiof0_sync",
static const struct {
struct sh_pfc_function common[52];
#if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961)
- struct sh_pfc_function automotive[4];
+ struct sh_pfc_function automotive[5];
#endif
} pinmux_functions = {
.common = {
SH_PFC_FUNCTION(drif1),
SH_PFC_FUNCTION(drif2),
SH_PFC_FUNCTION(drif3),
+ SH_PFC_FUNCTION(mlb_3pin),
}
#endif /* CONFIG_PINCTRL_PFC_R8A77960 || CONFIG_PINCTRL_PFC_R8A77961 */
};
IRQ5_MARK,
};
+#ifdef CONFIG_PINCTRL_PFC_R8A77965
+/* - MLB+ ------------------------------------------------------------------- */
+static const unsigned int mlb_3pin_pins[] = {
+ RCAR_GP_PIN(5, 23), RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25),
+};
+static const unsigned int mlb_3pin_mux[] = {
+ MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK,
+};
+#endif /* CONFIG_PINCTRL_PFC_R8A77965 */
+
/* - MSIOF0 ----------------------------------------------------------------- */
static const unsigned int msiof0_clk_pins[] = {
/* SCK */
static const struct {
struct sh_pfc_pin_group common[326];
#ifdef CONFIG_PINCTRL_PFC_R8A77965
- struct sh_pfc_pin_group automotive[30];
+ struct sh_pfc_pin_group automotive[31];
#endif
} pinmux_groups = {
.common = {
SH_PFC_PIN_GROUP(drif3_ctrl_b),
SH_PFC_PIN_GROUP(drif3_data0_b),
SH_PFC_PIN_GROUP(drif3_data1_b),
+ SH_PFC_PIN_GROUP(mlb_3pin),
}
#endif /* CONFIG_PINCTRL_PFC_R8A77965 */
};
"intc_ex_irq5",
};
+#ifdef CONFIG_PINCTRL_PFC_R8A77965
+static const char * const mlb_3pin_groups[] = {
+ "mlb_3pin",
+};
+#endif /* CONFIG_PINCTRL_PFC_R8A77965 */
+
static const char * const msiof0_groups[] = {
"msiof0_clk",
"msiof0_sync",
static const struct {
struct sh_pfc_function common[53];
#ifdef CONFIG_PINCTRL_PFC_R8A77965
- struct sh_pfc_function automotive[4];
+ struct sh_pfc_function automotive[5];
#endif
} pinmux_functions = {
.common = {
SH_PFC_FUNCTION(drif1),
SH_PFC_FUNCTION(drif2),
SH_PFC_FUNCTION(drif3),
+ SH_PFC_FUNCTION(mlb_3pin),
}
#endif /* CONFIG_PINCTRL_PFC_R8A77965 */
};