drm/amdgpu: drop mmRLC_PG_CNTL clear v2

SMU owns this register so the driver should not set it
to avoid breaking gfxoff.

v2: update description

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
Reviewed-by: Huang Rui <ray.huang at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 5e92002e72e2aae783786cedec89d5872aa33270..6439e65af55b756d238c4954da5c6309fb3e9dfb 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -2293,9 +2293,6 @@ static int gfx_v9_0_rlc_resume(struct amdgpu_device *adev)
        /* disable CG */
        WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL, 0);
 
-       /* disable PG */
-       WREG32_SOC15(GC, 0, mmRLC_PG_CNTL, 0);
-
        gfx_v9_0_rlc_reset(adev);
 
        gfx_v9_0_init_pg(adev);