]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/commitdiff
drm/i915/whl: Introducing Whiskey Lake platform
authorJosé Roberto de Souza <jose.souza@intel.com>
Wed, 5 Sep 2018 10:12:00 +0000 (12:12 +0200)
committerKleber Sacilotto de Souza <kleber.souza@canonical.com>
Wed, 5 Sep 2018 14:19:50 +0000 (16:19 +0200)
BugLink: http://bugs.launchpad.net/bugs/1789924
Whiskey Lake uses the same gen graphics as Coffe Lake, including some
ids that were previously marked as reserved on Coffe Lake, but that
now are moved to WHL page.

So, let's just move them to WHL macros that will feed into CFL macro
just to keep it better organized to make easier future code review
but it will be handled as a CFL.

v2:
Fixing GT level of some ids

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180614233720.30517-1-jose.souza@intel.com
(backported from commit b9be78531d2710f4302545aa80e0678ed0a3dd09)
Signed-off-by: Timo Aaltonen <timo.aaltonen@canonical.com>
Acked-by: Stefan Bader <stefan.bader@canonical.com>
Acked-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com>
Signed-off-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com>
drivers/gpu/drm/i915/i915_pci.c
include/drm/i915_pciids.h

index 537d420e59a03b7f58c5fb6320e97ffd15066bce..6fbbc1a8729d38223af2643353ee1e1be3c949ac 100644 (file)
@@ -631,9 +631,11 @@ static const struct pci_device_id pciidlist[] = {
        INTEL_CFL_S_GT1_IDS(&intel_coffeelake_gt1_info),
        INTEL_CFL_S_GT2_IDS(&intel_coffeelake_gt2_info),
        INTEL_CFL_H_GT2_IDS(&intel_coffeelake_gt2_info),
-       INTEL_CFL_U_GT1_IDS(&intel_coffeelake_gt1_info),
        INTEL_CFL_U_GT2_IDS(&intel_coffeelake_gt2_info),
        INTEL_CFL_U_GT3_IDS(&intel_coffeelake_gt3_info),
+       INTEL_WHL_U_GT1_IDS(&intel_coffeelake_gt1_info),
+       INTEL_WHL_U_GT2_IDS(&intel_coffeelake_gt2_info),
+       INTEL_WHL_U_GT3_IDS(&intel_coffeelake_gt3_info),
        INTEL_CNL_U_GT2_IDS(&intel_cannonlake_gt2_info),
        INTEL_CNL_Y_GT2_IDS(&intel_cannonlake_gt2_info),
        {0, 0, 0}
index 119e0c38d156bab57502bba66852e3b5f08f5a45..9c9ef5b7041f481e70ad335dcf2d5e0a8f93388a 100644 (file)
        INTEL_VGA_DEVICE(0x3E9B, info), /* Halo GT2 */ \
        INTEL_VGA_DEVICE(0x3E94, info)  /* Halo GT2 */
 
-/* CFL U GT1 */
-#define INTEL_CFL_U_GT1_IDS(info) \
-       INTEL_VGA_DEVICE(0x3EA1, info), \
-       INTEL_VGA_DEVICE(0x3EA4, info)
-
 /* CFL U GT2 */
 #define INTEL_CFL_U_GT2_IDS(info) \
-       INTEL_VGA_DEVICE(0x3EA0, info), \
-       INTEL_VGA_DEVICE(0x3EA3, info), \
        INTEL_VGA_DEVICE(0x3EA9, info)
 
 /* CFL U GT3 */
 #define INTEL_CFL_U_GT3_IDS(info) \
-       INTEL_VGA_DEVICE(0x3EA2, info), /* ULT GT3 */ \
        INTEL_VGA_DEVICE(0x3EA5, info), /* ULT GT3 */ \
        INTEL_VGA_DEVICE(0x3EA6, info), /* ULT GT3 */ \
        INTEL_VGA_DEVICE(0x3EA7, info), /* ULT GT3 */ \
        INTEL_VGA_DEVICE(0x3EA8, info)  /* ULT GT3 */
 
+/* WHL/CFL U GT1 */
+#define INTEL_WHL_U_GT1_IDS(info) \
+       INTEL_VGA_DEVICE(0x3EA1, info)
+
+/* WHL/CFL U GT2 */
+#define INTEL_WHL_U_GT2_IDS(info) \
+       INTEL_VGA_DEVICE(0x3EA0, info)
+
+/* WHL/CFL U GT3 */
+#define INTEL_WHL_U_GT3_IDS(info) \
+       INTEL_VGA_DEVICE(0x3EA2, info), \
+       INTEL_VGA_DEVICE(0x3EA3, info), \
+       INTEL_VGA_DEVICE(0x3EA4, info)
+
 #define INTEL_CFL_IDS(info)       \
        INTEL_CFL_S_GT1_IDS(info), \
        INTEL_CFL_S_GT2_IDS(info), \
        INTEL_CFL_H_GT2_IDS(info), \
-       INTEL_CFL_U_GT1_IDS(info), \
        INTEL_CFL_U_GT2_IDS(info), \
-       INTEL_CFL_U_GT3_IDS(info)
+       INTEL_CFL_U_GT3_IDS(info), \
+       INTEL_WHL_U_GT1_IDS(info), \
+       INTEL_WHL_U_GT2_IDS(info), \
+       INTEL_WHL_U_GT3_IDS(info)
 
 /* CNL U 2+2 */
 #define INTEL_CNL_U_GT2_IDS(info) \