drm/amdgpu: update mall info v2 from discovery

Mall info v2 is introduced in ip discovery

Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Shiwu Zhang <shiwu.zhang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
index 74ffe6581c8548fe81d47f33893ef74fb4ff960a..d4a7e33653d9220a51183c3edca3543fb37977a4 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
@@ -1478,6 +1478,7 @@ static int amdgpu_discovery_get_gfx_info(struct amdgpu_device *adev)
 
 union mall_info {
        struct mall_info_v1_0 v1;
+       struct mall_info_v2_0 v2;
 };
 
 static int amdgpu_discovery_get_mall_info(struct amdgpu_device *adev)
@@ -1518,6 +1519,10 @@ static int amdgpu_discovery_get_mall_info(struct amdgpu_device *adev)
                adev->gmc.mall_size = mall_size;
                adev->gmc.m_half_use = half_use;
                break;
+       case 2:
+               mall_size_per_umc = le32_to_cpu(mall_info->v2.mall_size_per_umc);
+               adev->gmc.mall_size = mall_size_per_umc * adev->gmc.num_umc;
+               break;
        default:
                dev_err(adev->dev,
                        "Unhandled MALL info table %d.%d\n",

diff --git a/drivers/gpu/drm/amd/include/discovery.h b/drivers/gpu/drm/amd/include/discovery.h
index f43e29722ef7104b1ef2a1370ac64f02a508d764..b9884e576f98c01bc1e9bbe5d658f46c3c872aaa 100644 (file)
--- a/drivers/gpu/drm/amd/include/discovery.h
+++ b/drivers/gpu/drm/amd/include/discovery.h
@@ -30,7 +30,7 @@
 #define GC_TABLE_ID                     0x4347
 #define HARVEST_TABLE_SIGNATURE         0x56524148
 #define VCN_INFO_TABLE_ID               0x004E4356
-#define MALL_INFO_TABLE_ID              0x4D414C4C
+#define MALL_INFO_TABLE_ID              0x4C4C414D
 
 typedef enum
 {
@@ -312,6 +312,12 @@ struct mall_info_v1_0 {
        uint32_t reserved[5];
 };
 
+struct mall_info_v2_0 {
+       struct mall_info_header header;
+       uint32_t mall_size_per_umc;
+       uint32_t reserved[8];
+};
+
 #define VCN_INFO_TABLE_MAX_NUM_INSTANCES 4
 
 struct vcn_info_header {