dis-buf.c i386-dis.c opreg_template.h syscall_defs.h\
i386.ld ppc.ld\
tests/test-i386.c tests/test-i386-shift.h tests/test-i386.h\
+tests/test-i386-muldiv.h\
tests/test2.c tests/hello.c tests/sha1.c tests/test1.c
FILE=gemu-$(VERSION)
uint32_t segs[6];
/* emulator internal variables */
-
CPU86_LDouble ft0;
-
+
/* exception handling */
jmp_buf jmp_env;
int exception_index;
static int glue(compute_all_shl, SUFFIX)(void)
{
int cf, pf, af, zf, sf, of;
- cf = CC_SRC & 1;
+ cf = (CC_SRC >> (DATA_BITS - 1)) & CC_C;
pf = parity_table[(uint8_t)CC_DST];
af = 0; /* undefined */
zf = ((DATA_TYPE)CC_DST == 0) << 6;
sf = lshift(CC_DST, 8 - DATA_BITS) & 0x80;
- of = lshift(CC_SRC, 12 - DATA_BITS) & CC_O; /* only meaniful for shr with count == 1 */
+ /* of is defined if shift count == 1 */
+ of = lshift(CC_SRC ^ CC_DST, 12 - DATA_BITS) & CC_O;
return cf | pf | af | zf | sf | of;
}
af = 0; /* undefined */
zf = ((DATA_TYPE)CC_DST == 0) << 6;
sf = lshift(CC_DST, 8 - DATA_BITS) & 0x80;
- of = 0; /* only meaniful for shr with count == 1 */
+ /* of is defined if shift count == 1 */
+ of = lshift(CC_SRC ^ CC_DST, 12 - DATA_BITS) & CC_O;
return cf | pf | af | zf | sf | of;
}
{
int count;
count = T1 & 0x1f;
- if (count == 1) {
- CC_SRC = T0;
- T0 = T0 << 1;
- CC_DST = T0;
- CC_OP = CC_OP_ADDB + SHIFT;
- } else if (count) {
- CC_SRC = (DATA_TYPE)T0 >> (DATA_BITS - count);
+ if (count) {
+ CC_SRC = (DATA_TYPE)T0 << (count - 1);
T0 = T0 << count;
CC_DST = T0;
CC_OP = CC_OP_SHLB + SHIFT;
CC_SRC = T0 >> (count - 1);
T0 = T0 >> count;
CC_DST = T0;
- CC_OP = CC_OP_SHLB + SHIFT;
+ CC_OP = CC_OP_SARB + SHIFT;
}
FORCE_RET();
}
count = T1 & 0x1f;
if (count) {
src = (DATA_STYPE)T0;
- CC_SRC = src >> (count - 1);
+ CC_SRC = src >> (count - 1);
T0 = src >> count;
CC_DST = T0;
CC_OP = CC_OP_SARB + SHIFT;
FORCE_RET();
}
+#if DATA_BITS == 16
+/* XXX: overflow flag might be incorrect in some cases in shldw */
+void OPPROTO glue(glue(op_shld, SUFFIX), _T0_T1_im_cc)(void)
+{
+ int count;
+ unsigned int res;
+ count = PARAM1;
+ T1 &= 0xffff;
+ res = T1 | (T0 << 16);
+ CC_SRC = res >> (32 - count);
+ res <<= count;
+ if (count > 16)
+ res |= T1 << (count - 16);
+ T0 = res >> 16;
+ CC_DST = T0;
+}
+
+void OPPROTO glue(glue(op_shld, SUFFIX), _T0_T1_ECX_cc)(void)
+{
+ int count;
+ unsigned int res;
+ count = ECX & 0x1f;
+ if (count) {
+ T1 &= 0xffff;
+ res = T1 | (T0 << 16);
+ CC_SRC = res >> (32 - count);
+ res <<= count;
+ if (count > 16)
+ res |= T1 << (count - 16);
+ T0 = res >> 16;
+ CC_DST = T0;
+ CC_OP = CC_OP_SARB + SHIFT;
+ }
+}
+
+void OPPROTO glue(glue(op_shrd, SUFFIX), _T0_T1_im_cc)(void)
+{
+ int count;
+ unsigned int res;
+
+ count = PARAM1;
+ res = (T0 & 0xffff) | (T1 << 16);
+ CC_SRC = res >> (count - 1);
+ res >>= count;
+ if (count > 16)
+ res |= T1 << (32 - count);
+ T0 = res;
+ CC_DST = T0;
+}
+
+
+void OPPROTO glue(glue(op_shrd, SUFFIX), _T0_T1_ECX_cc)(void)
+{
+ int count;
+ unsigned int res;
+
+ count = ECX & 0x1f;
+ if (count) {
+ res = (T0 & 0xffff) | (T1 << 16);
+ CC_SRC = res >> (count - 1);
+ res >>= count;
+ if (count > 16)
+ res |= T1 << (32 - count);
+ T0 = res;
+ CC_DST = T0;
+ CC_OP = CC_OP_SARB + SHIFT;
+ }
+}
+#endif
+
+#if DATA_BITS == 32
+void OPPROTO glue(glue(op_shld, SUFFIX), _T0_T1_im_cc)(void)
+{
+ int count;
+ count = PARAM1;
+ T0 &= DATA_MASK;
+ T1 &= DATA_MASK;
+ CC_SRC = T0 << (count - 1);
+ T0 = (T0 << count) | (T1 >> (DATA_BITS - count));
+ CC_DST = T0;
+}
+
+void OPPROTO glue(glue(op_shld, SUFFIX), _T0_T1_ECX_cc)(void)
+{
+ int count;
+ count = ECX & 0x1f;
+ if (count) {
+ T0 &= DATA_MASK;
+ T1 &= DATA_MASK;
+ CC_SRC = T0 << (count - 1);
+ T0 = (T0 << count) | (T1 >> (DATA_BITS - count));
+ CC_DST = T0;
+ CC_OP = CC_OP_SHLB + SHIFT;
+ }
+}
+
+void OPPROTO glue(glue(op_shrd, SUFFIX), _T0_T1_im_cc)(void)
+{
+ int count;
+ count = PARAM1;
+ T0 &= DATA_MASK;
+ T1 &= DATA_MASK;
+ CC_SRC = T0 >> (count - 1);
+ T0 = (T0 >> count) | (T1 << (DATA_BITS - count));
+ CC_DST = T0;
+}
+
+
+void OPPROTO glue(glue(op_shrd, SUFFIX), _T0_T1_ECX_cc)(void)
+{
+ int count;
+ count = ECX & 0x1f;
+ if (count) {
+ T0 &= DATA_MASK;
+ T1 &= DATA_MASK;
+ CC_SRC = T0 >> (count - 1);
+ T0 = (T0 >> count) | (T1 << (DATA_BITS - count));
+ CC_DST = T0;
+ CC_OP = CC_OP_SARB + SHIFT;
+ }
+}
+#endif
+
/* carry add/sub (we only need to set CC_OP differently) */
void OPPROTO glue(glue(op_adc, SUFFIX), _T0_T1_cc)(void)
$(CC) $(CFLAGS) $(LDFLAGS) -o $@ $<
# i386 emulation test (dump various opcodes) */
-test-i386: test-i386.c test-i386.h test-i386-shift.h
+test-i386: test-i386.c test-i386.h test-i386-shift.h test-i386-muldiv.h
$(CC) $(CFLAGS) $(LDFLAGS) -static -o $@ $<
test: test-i386
--- /dev/null
+
+void glue(glue(test_, OP), b)(int op0, int op1)
+{
+ int res, s1, s0, flags;
+ s0 = op0;
+ s1 = op1;
+ res = s0;
+ flags = 0;
+ asm ("push %4\n\t"
+ "popf\n\t"
+ stringify(OP)"b %b2\n\t"
+ "pushf\n\t"
+ "popl %1\n\t"
+ : "=a" (res), "=g" (flags)
+ : "q" (s1), "0" (res), "1" (flags));
+ printf("%-10s A=%08x B=%08x R=%08x CC=%04x\n",
+ stringify(OP) "b", s0, s1, res, flags & CC_MASK);
+}
+
+void glue(glue(test_, OP), w)(int op0h, int op0, int op1)
+{
+ int res, s1, flags, resh;
+ s1 = op1;
+ resh = op0h;
+ res = op0;
+ flags = 0;
+ asm ("push %5\n\t"
+ "popf\n\t"
+ stringify(OP) "w %w3\n\t"
+ "pushf\n\t"
+ "popl %1\n\t"
+ : "=a" (res), "=g" (flags), "=d" (resh)
+ : "q" (s1), "0" (res), "1" (flags), "2" (resh));
+ printf("%-10s AH=%08x AL=%08x B=%08x RH=%08x RL=%08x CC=%04x\n",
+ stringify(OP) "w", op0h, op0, s1, resh, res, flags & CC_MASK);
+}
+
+void glue(glue(test_, OP), l)(int op0h, int op0, int op1)
+{
+ int res, s1, flags, resh;
+ s1 = op1;
+ resh = op0h;
+ res = op0;
+ flags = 0;
+ asm ("push %5\n\t"
+ "popf\n\t"
+ stringify(OP) "l %3\n\t"
+ "pushf\n\t"
+ "popl %1\n\t"
+ : "=a" (res), "=g" (flags), "=d" (resh)
+ : "q" (s1), "0" (res), "1" (flags), "2" (resh));
+ printf("%-10s AH=%08x AL=%08x B=%08x RH=%08x RL=%08x CC=%04x\n",
+ stringify(OP) "l", op0h, op0, s1, resh, res, flags & CC_MASK);
+}
+
+#undef OP
#define exec_opw glue(glue(exec_, OP), w)
#define exec_opb glue(glue(exec_, OP), b)
-#define EXECSHIFT(size, res, s1, flags) \
+#ifndef OP_SHIFTD
+
+#ifdef OP_NOBYTE
+#define EXECSHIFT(size, res, s1, s2, flags) \
+ asm ("push %4\n\t"\
+ "popf\n\t"\
+ stringify(OP) size " %" size "2, %" size "0\n\t" \
+ "pushf\n\t"\
+ "popl %1\n\t"\
+ : "=g" (res), "=g" (flags)\
+ : "r" (s1), "0" (res), "1" (flags));
+#else
+#define EXECSHIFT(size, res, s1, s2, flags) \
asm ("push %4\n\t"\
"popf\n\t"\
stringify(OP) size " %%cl, %" size "0\n\t" \
"popl %1\n\t"\
: "=q" (res), "=g" (flags)\
: "c" (s1), "0" (res), "1" (flags));
+#endif
-void exec_opl(int s0, int s1, int iflags)
+void exec_opl(int s2, int s0, int s1, int iflags)
{
int res, flags;
res = s0;
flags = iflags;
- EXECSHIFT("", res, s1, flags);
+ EXECSHIFT("", res, s1, s2, flags);
/* overflow is undefined if count != 1 */
if (s1 != 1)
flags &= ~CC_O;
stringify(OP) "l", s0, s1, res, iflags, flags & CC_MASK);
}
-void exec_opw(int s0, int s1, int iflags)
+void exec_opw(int s2, int s0, int s1, int iflags)
{
int res, flags;
res = s0;
flags = iflags;
- EXECSHIFT("w", res, s1, flags);
+ EXECSHIFT("w", res, s1, s2, flags);
/* overflow is undefined if count != 1 */
if (s1 != 1)
flags &= ~CC_O;
stringify(OP) "w", s0, s1, res, iflags, flags & CC_MASK);
}
+#else
+#define EXECSHIFT(size, res, s1, s2, flags) \
+ asm ("push %4\n\t"\
+ "popf\n\t"\
+ stringify(OP) size " %%cl, %" size "5, %" size "0\n\t" \
+ "pushf\n\t"\
+ "popl %1\n\t"\
+ : "=g" (res), "=g" (flags)\
+ : "c" (s1), "0" (res), "1" (flags), "r" (s2));
+
+void exec_opl(int s2, int s0, int s1, int iflags)
+{
+ int res, flags;
+ res = s0;
+ flags = iflags;
+ EXECSHIFT("", res, s1, s2, flags);
+ /* overflow is undefined if count != 1 */
+ if (s1 != 1)
+ flags &= ~CC_O;
+ printf("%-10s A=%08x B=%08x C=%08x R=%08x CCIN=%04x CC=%04x\n",
+ stringify(OP) "l", s0, s2, s1, res, iflags, flags & CC_MASK);
+}
+
+void exec_opw(int s2, int s0, int s1, int iflags)
+{
+ int res, flags;
+ res = s0;
+ flags = iflags;
+ EXECSHIFT("w", res, s1, s2, flags);
+ /* overflow is undefined if count != 1 */
+ if (s1 != 1)
+ flags &= ~CC_O;
+ printf("%-10s A=%08x B=%08x C=%08x R=%08x CCIN=%04x CC=%04x\n",
+ stringify(OP) "w", s0, s2, s1, res, iflags, flags & CC_MASK);
+}
+
+#endif
+
+#ifndef OP_NOBYTE
void exec_opb(int s0, int s1, int iflags)
{
int res, flags;
res = s0;
flags = iflags;
- EXECSHIFT("b", res, s1, flags);
+ EXECSHIFT("b", res, s1, 0, flags);
/* overflow is undefined if count != 1 */
if (s1 != 1)
flags &= ~CC_O;
printf("%-10s A=%08x B=%08x R=%08x CCIN=%04x CC=%04x\n",
stringify(OP) "b", s0, s1, res, iflags, flags & CC_MASK);
}
+#endif
-void exec_op(int s0, int s1)
+void exec_op(int s2, int s0, int s1)
{
- exec_opl(s0, s1, 0);
- exec_opw(s0, s1, 0);
+ exec_opl(s2, s0, s1, 0);
+ exec_opw(s2, s0, s1, 0);
+#ifndef OP_NOBYTE
exec_opb(s0, s1, 0);
+#endif
#ifdef OP_CC
- exec_opl(s0, s1, CC_C);
- exec_opw(s0, s1, CC_C);
+ exec_opl(s2, s0, s1, CC_C);
+ exec_opw(s2, s0, s1, CC_C);
exec_opb(s0, s1, CC_C);
#endif
}
{
int i;
for(i = 0; i < 32; i++)
- exec_op(0x12345678, i);
+ exec_op(0x21ad3d34, 0x12345678, i);
for(i = 0; i < 32; i++)
- exec_op(0x82345678, i);
+ exec_op(0x813f3421, 0x82345678, i);
}
void *glue(_test_, OP) __init_call = glue(test_, OP);
#undef OP
#undef OP_CC
+#undef OP_SHIFTD
+#undef OP_NOBYTE
+#undef EXECSHIFT
+
#define OP_CC
#include "test-i386-shift.h"
+#define OP shld
+#define OP_SHIFTD
+#define OP_NOBYTE
+#include "test-i386-shift.h"
+
+#define OP shrd
+#define OP_SHIFTD
+#define OP_NOBYTE
+#include "test-i386-shift.h"
+
+/* XXX: should be more precise ? */
+#undef CC_MASK
+#define CC_MASK (CC_C)
+
+#define OP bt
+#define OP_NOBYTE
+#include "test-i386-shift.h"
+
+#define OP bts
+#define OP_NOBYTE
+#include "test-i386-shift.h"
+
+#define OP btr
+#define OP_NOBYTE
+#include "test-i386-shift.h"
+
+#define OP btc
+#define OP_NOBYTE
+#include "test-i386-shift.h"
/* lea test (modrm support) */
#define TEST_LEA(STR)\
void **ptr;
void (*func)(void);
- test_mul();
-#if 0
ptr = &call_start + 1;
while (*ptr != NULL) {
func = *ptr++;
func();
}
+ test_mul();
test_jcc();
test_lea();
-#endif
return 0;
}
--- /dev/null
+
+#define exec_op glue(exec_, OP)
+#define exec_opl glue(glue(exec_, OP), l)
+#define exec_opw glue(glue(exec_, OP), w)
+#define exec_opb glue(glue(exec_, OP), b)
+
+#define EXECOP2(size, res, s1, flags) \
+ asm ("push %4\n\t"\
+ "popf\n\t"\
+ stringify(OP) size " %" size "2, %" size "0\n\t" \
+ "pushf\n\t"\
+ "popl %1\n\t"\
+ : "=q" (res), "=g" (flags)\
+ : "q" (s1), "0" (res), "1" (flags));
+
+#define EXECOP1(size, res, flags) \
+ asm ("push %3\n\t"\
+ "popf\n\t"\
+ stringify(OP) size " %" size "0\n\t" \
+ "pushf\n\t"\
+ "popl %1\n\t"\
+ : "=q" (res), "=g" (flags)\
+ : "0" (res), "1" (flags));
+
+#ifdef OP1
+void exec_opl(int s0, int s1, int iflags)
+{
+ int res, flags;
+ res = s0;
+ flags = iflags;
+ EXECOP1("", res, flags);
+ printf("%-10s A=%08x R=%08x CCIN=%04x CC=%04x\n",
+ stringify(OP) "l", s0, res, iflags, flags & CC_MASK);
+}
+
+void exec_opw(int s0, int s1, int iflags)
+{
+ int res, flags;
+ res = s0;
+ flags = iflags;
+ EXECOP1("w", res, flags);
+ printf("%-10s A=%08x R=%08x CCIN=%04x CC=%04x\n",
+ stringify(OP) "w", s0, res, iflags, flags & CC_MASK);
+}
+
+void exec_opb(int s0, int s1, int iflags)
+{
+ int res, flags;
+ res = s0;
+ flags = iflags;
+ EXECOP1("b", res, flags);
+ printf("%-10s A=%08x R=%08x CCIN=%04x CC=%04x\n",
+ stringify(OP) "b", s0, res, iflags, flags & CC_MASK);
+}
+#else
+void exec_opl(int s0, int s1, int iflags)
+{
+ int res, flags;
+ res = s0;
+ flags = iflags;
+ EXECOP2("", res, s1, flags);
+ printf("%-10s A=%08x B=%08x R=%08x CCIN=%04x CC=%04x\n",
+ stringify(OP) "l", s0, s1, res, iflags, flags & CC_MASK);
+}
+
+void exec_opw(int s0, int s1, int iflags)
+{
+ int res, flags;
+ res = s0;
+ flags = iflags;
+ EXECOP2("w", res, s1, flags);
+ printf("%-10s A=%08x B=%08x R=%08x CCIN=%04x CC=%04x\n",
+ stringify(OP) "w", s0, s1, res, iflags, flags & CC_MASK);
+}
+
+void exec_opb(int s0, int s1, int iflags)
+{
+ int res, flags;
+ res = s0;
+ flags = iflags;
+ EXECOP2("b", res, s1, flags);
+ printf("%-10s A=%08x B=%08x R=%08x CCIN=%04x CC=%04x\n",
+ stringify(OP) "b", s0, s1, res, iflags, flags & CC_MASK);
+}
+#endif
+
+void exec_op(int s0, int s1)
+{
+ exec_opl(s0, s1, 0);
+ exec_opw(s0, s1, 0);
+ exec_opb(s0, s1, 0);
+#ifdef OP_CC
+ exec_opl(s0, s1, CC_C);
+ exec_opw(s0, s1, CC_C);
+ exec_opb(s0, s1, CC_C);
+#endif
+}
+
+void glue(test_, OP)(void)
+{
+ exec_op(0x12345678, 0x812FADA);
+ exec_op(0x12341, 0x12341);
+ exec_op(0x12341, -0x12341);
+ exec_op(0xffffffff, 0);
+ exec_op(0xffffffff, -1);
+ exec_op(0xffffffff, 1);
+ exec_op(0xffffffff, 2);
+ exec_op(0x7fffffff, 0);
+ exec_op(0x7fffffff, 1);
+ exec_op(0x7fffffff, -1);
+ exec_op(0x80000000, -1);
+ exec_op(0x80000000, 1);
+ exec_op(0x80000000, -2);
+ exec_op(0x12347fff, 0);
+ exec_op(0x12347fff, 1);
+ exec_op(0x12347fff, -1);
+ exec_op(0x12348000, -1);
+ exec_op(0x12348000, 1);
+ exec_op(0x12348000, -2);
+ exec_op(0x12347f7f, 0);
+ exec_op(0x12347f7f, 1);
+ exec_op(0x12347f7f, -1);
+ exec_op(0x12348080, -1);
+ exec_op(0x12348080, 1);
+ exec_op(0x12348080, -2);
+}
+
+void *glue(_test_, OP) __init_call = glue(test_, OP);
+
+#undef OP
+#undef OP_CC
},
};
+static GenOpFunc1 *gen_op_shiftd_T0_T1_im_cc[2][2] = {
+ [0] = {
+ gen_op_shldw_T0_T1_im_cc,
+ gen_op_shrdw_T0_T1_im_cc,
+ },
+ [1] = {
+ gen_op_shldl_T0_T1_im_cc,
+ gen_op_shrdl_T0_T1_im_cc,
+ },
+};
+
+static GenOpFunc *gen_op_shiftd_T0_T1_ECX_cc[2][2] = {
+ [0] = {
+ gen_op_shldw_T0_T1_ECX_cc,
+ gen_op_shrdw_T0_T1_ECX_cc,
+ },
+ [1] = {
+ gen_op_shldl_T0_T1_ECX_cc,
+ gen_op_shrdl_T0_T1_ECX_cc,
+ },
+};
+
static GenOpFunc *gen_op_btx_T0_T1_cc[2][4] = {
[0] = {
gen_op_btw_T0_T1_cc,
shift = 0;
goto grp2;
+ case 0x1a4: /* shld imm */
+ op = 0;
+ shift = 1;
+ goto do_shiftd;
+ case 0x1a5: /* shld cl */
+ op = 0;
+ shift = 0;
+ goto do_shiftd;
+ case 0x1ac: /* shrd imm */
+ op = 1;
+ shift = 1;
+ goto do_shiftd;
+ case 0x1ad: /* shrd cl */
+ op = 1;
+ shift = 0;
+ do_shiftd:
+ ot = dflag ? OT_LONG : OT_WORD;
+ modrm = ldub(s->pc++);
+ mod = (modrm >> 6) & 3;
+ rm = modrm & 7;
+ reg = (modrm >> 3) & 7;
+
+ if (mod != 3) {
+ gen_lea_modrm(s, modrm, ®_addr, &offset_addr);
+ gen_op_ld_T0_A0[ot]();
+ } else {
+ gen_op_mov_TN_reg[ot][0][rm]();
+ }
+ gen_op_mov_TN_reg[ot][1][reg]();
+
+ if (shift) {
+ val = ldub(s->pc++);
+ val &= 0x1f;
+ if (val) {
+ gen_op_shiftd_T0_T1_im_cc[ot - OT_WORD][op](val);
+ if (op == 0 && ot != OT_WORD)
+ s->cc_op = CC_OP_SHLB + ot;
+ else
+ s->cc_op = CC_OP_SARB + ot;
+ }
+ } else {
+ if (s->cc_op != CC_OP_DYNAMIC)
+ gen_op_set_cc_op(s->cc_op);
+ gen_op_shiftd_T0_T1_ECX_cc[ot - OT_WORD][op]();
+ s->cc_op = CC_OP_DYNAMIC; /* cannot predict flags after */
+ }
+ if (mod != 3) {
+ gen_op_st_T0_A0[ot]();
+ } else {
+ gen_op_mov_reg_T0[ot][rm]();
+ }
+ break;
+
/************************/
/* floats */
case 0xd8 ... 0xdf:
break;
#endif
default:
+ error("unhandled FP df/4\n");
return -1;
}
break;
return -1;
op -= 4;
gen_op_btx_T0_T1_cc[ot - OT_WORD][op]();
- s->cc_op = CC_OP_SHLB + ot;
+ s->cc_op = CC_OP_SARB + ot;
if (op != 0) {
if (mod != 3)
gen_op_st_T0_A0[ot]();
gen_op_mov_TN_reg[ot][0][rm]();
}
gen_op_btx_T0_T1_cc[ot - OT_WORD][op]();
- s->cc_op = CC_OP_SHLB + ot;
+ s->cc_op = CC_OP_SARB + ot;
if (op != 0) {
if (mod != 3)
gen_op_st_T0_A0[ot]();
is_jmp = 0;
ret = disas_insn(dc, pc_start, &is_jmp);
if (ret == -1)
- error("unknown instruction at PC=0x%x", pc_start);
+ error("unknown instruction at PC=0x%x B=%02x %02x",
+ pc_start, pc_start[0], pc_start[1]);
/* we must store the eflags state if it is not already done */
if (dc->cc_op != CC_OP_DYNAMIC)
gen_op_set_cc_op(dc->cc_op);
projects / qemu.git / commitdiff