drm/i915/pxp: Add GSC-CS back-end resource init and cleanup

For MTL, the PXP back-end transport uses the GSC engine to submit
HECI packets through the HW to the GSC firmware for PXP arb
session management. This submission uses a non-priveleged
batch buffer, a buffer for the command packet and of course
a context targeting the GSC-CS.

Thus for MTL, we need to allocate and free a set of execution
submission resources for the management of the arbitration session.
Lets start with the context creation first since that object and
its usage is very straight-forward. We'll add the buffer allocation
and freeing later when we introduce the gsccs' send-message function.

Do this one time allocation of gsccs specific resources in
a new gsccs source file with intel_pxp_gsccs_init / fini functions
and hook them up from the PXP front-end.

Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230511231738.1077674-2-alan.previn.teres.alexis@intel.com

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 4494dcd2eb5d1f07e26137f5136de68cf0efc0b9..c58d7b19366442256e3d9ed04c34d8d8f8ffe1b2 100644 (file)
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -339,6 +339,7 @@ i915-y += \
 i915-$(CONFIG_DRM_I915_PXP) += \
        pxp/intel_pxp_cmd.o \
        pxp/intel_pxp_debugfs.o \
+       pxp/intel_pxp_gsccs.o \
        pxp/intel_pxp_irq.o \
        pxp/intel_pxp_pm.o \
        pxp/intel_pxp_session.o

diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
index 9d4c7724e98edf335ef66a1eede01caca646fbed..f93aa171aa1e0e75212afb6033152e811d3a77d7 100644 (file)
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
@@ -12,6 +12,7 @@
 #include "i915_drv.h"
 
 #include "intel_pxp.h"
+#include "intel_pxp_gsccs.h"
 #include "intel_pxp_irq.h"
 #include "intel_pxp_session.h"
 #include "intel_pxp_tee.h"
@@ -132,7 +133,10 @@ static void pxp_init_full(struct intel_pxp *pxp)
        if (ret)
                return;
 
-       ret = intel_pxp_tee_component_init(pxp);
+       if (HAS_ENGINE(pxp->ctrl_gt, GSC0))
+               ret = intel_pxp_gsccs_init(pxp);
+       else
+               ret = intel_pxp_tee_component_init(pxp);
        if (ret)
                goto out_context;
 
@@ -165,9 +169,12 @@ static struct intel_gt *find_gt_for_required_protected_content(struct drm_i915_p
        /*
         * For MTL onwards, PXP-controller-GT needs to have a valid GSC engine
         * on the media GT. NOTE: if we have a media-tile with a GSC-engine,
-        * the VDBOX is already present so skip that check
+        * the VDBOX is already present so skip that check. We also have to
+        * ensure the GSC and HUC firmware are coming online
         */
-       if (i915->media_gt && HAS_ENGINE(i915->media_gt, GSC0))
+       if (i915->media_gt && HAS_ENGINE(i915->media_gt, GSC0) &&
+           intel_uc_fw_is_loadable(&i915->media_gt->uc.gsc.fw) &&
+           intel_uc_fw_is_loadable(&i915->media_gt->uc.huc.fw))
                return i915->media_gt;
 
        /*
@@ -207,7 +214,9 @@ int intel_pxp_init(struct drm_i915_private *i915)
        if (!i915->pxp)
                return -ENOMEM;
 
+       /* init common info used by all feature-mode usages*/
        i915->pxp->ctrl_gt = gt;
+       mutex_init(&i915->pxp->tee_mutex);
 
        /*
         * If full PXP feature is not available but HuC is loaded by GSC on pre-MTL
@@ -229,7 +238,10 @@ void intel_pxp_fini(struct drm_i915_private *i915)
 
        i915->pxp->arb_is_valid = false;
 
-       intel_pxp_tee_component_fini(i915->pxp);
+       if (HAS_ENGINE(i915->pxp->ctrl_gt, GSC0))
+               intel_pxp_gsccs_fini(i915->pxp);
+       else
+               intel_pxp_tee_component_fini(i915->pxp);
 
        destroy_vcs_context(i915->pxp);
 

diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c b/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c
new file mode 100644 (file)
index 0000000..bad5571
--- /dev/null
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c
@@ -0,0 +1,63 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright(c) 2023 Intel Corporation.
+ */
+
+#include "gem/i915_gem_internal.h"
+
+#include "gt/intel_context.h"
+
+#include "i915_drv.h"
+#include "intel_pxp_cmd_interface_43.h"
+#include "intel_pxp_gsccs.h"
+#include "intel_pxp_types.h"
+
+static void
+gsccs_destroy_execution_resource(struct intel_pxp *pxp)
+{
+       struct gsccs_session_resources *exec_res = &pxp->gsccs_res;
+
+       if (exec_res->ce)
+               intel_context_put(exec_res->ce);
+
+       memset(exec_res, 0, sizeof(*exec_res));
+}
+
+static int
+gsccs_allocate_execution_resource(struct intel_pxp *pxp)
+{
+       struct intel_gt *gt = pxp->ctrl_gt;
+       struct gsccs_session_resources *exec_res = &pxp->gsccs_res;
+       struct intel_engine_cs *engine = gt->engine[GSC0];
+       struct intel_context *ce;
+
+       /*
+        * First, ensure the GSC engine is present.
+        * NOTE: Backend would only be called with the correct gt.
+        */
+       if (!engine)
+               return -ENODEV;
+
+       /* Finally, create an intel_context to be used during the submission */
+       ce = intel_context_create(engine);
+       if (IS_ERR(ce)) {
+               drm_err(&gt->i915->drm, "Failed creating gsccs backend ctx\n");
+               return PTR_ERR(ce);
+       }
+
+       i915_vm_put(ce->vm);
+       ce->vm = i915_vm_get(pxp->ctrl_gt->vm);
+       exec_res->ce = ce;
+
+       return 0;
+}
+
+void intel_pxp_gsccs_fini(struct intel_pxp *pxp)
+{
+       gsccs_destroy_execution_resource(pxp);
+}
+
+int intel_pxp_gsccs_init(struct intel_pxp *pxp)
+{
+       return gsccs_allocate_execution_resource(pxp);
+}

diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.h b/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.h
new file mode 100644 (file)
index 0000000..354ea9a
--- /dev/null
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright(c) 2022, Intel Corporation. All rights reserved.
+ */
+
+#ifndef __INTEL_PXP_GSCCS_H__
+#define __INTEL_PXP_GSCCS_H__
+
+#include <linux/types.h>
+
+struct intel_pxp;
+
+#ifdef CONFIG_DRM_I915_PXP
+void intel_pxp_gsccs_fini(struct intel_pxp *pxp);
+int intel_pxp_gsccs_init(struct intel_pxp *pxp);
+
+#else
+static inline void intel_pxp_gsccs_fini(struct intel_pxp *pxp)
+{
+}
+
+static inline int intel_pxp_gsccs_init(struct intel_pxp *pxp)
+{
+       return 0;
+}
+
+#endif
+
+#endif /*__INTEL_PXP_GSCCS_H__ */

diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
index a2846b1dbbee45b378f47623b1f4558625ce77ec..1ce07d7e876909cc8944c0ad87f7177042f498be 100644 (file)
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
@@ -284,8 +284,6 @@ int intel_pxp_tee_component_init(struct intel_pxp *pxp)
        struct intel_gt *gt = pxp->ctrl_gt;
        struct drm_i915_private *i915 = gt->i915;
 
-       mutex_init(&pxp->tee_mutex);
-
        ret = alloc_streaming_command(pxp);
        if (ret)
                return ret;

diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_types.h b/drivers/gpu/drm/i915/pxp/intel_pxp_types.h
index c445f7f2f47ac88bab59c44b29bfd091d4c019fe..1759106b9a8e138c7827f9950a22a6e26bd15846 100644 (file)
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_types.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_types.h
@@ -26,6 +26,14 @@ struct intel_pxp {
         */
        struct intel_gt *ctrl_gt;
 
+       /**
+        * @gsccs_res: resources for request submission for platforms that have a GSC engine.
+        */
+       struct gsccs_session_resources {
+               u64 host_session_handle; /* used by firmware to link commands to sessions */
+               struct intel_context *ce; /* context for gsc command submission */
+       } gsccs_res;
+
        /**
         * @pxp_component: i915_pxp_component struct of the bound mei_pxp
         * module. Only set and cleared inside component bind/unbind functions,