drm/mipi-dsi: consider low power transmission

This patch adds a new flag, MIPI_DSI-MODE_LPM, to transmit data
in low power. With this flag, msg.flags has MIPI_DSI_MSG_USE_LPM
so that host driver of each SoC can clear or set relevant register
bit for low power transmission.

All host drivers shall support continuous clock behavior on the
Clock Lane, and optionally may support non-continuous clock behavior.
Both of them can transmit data in high speed of low power.

With each clock behavior, non-continuous or continuous clock mode,
host controller will transmit data in high speed by default so if
peripheral wants to receive data in low power, the peripheral driver
should set MIPI_DSI_MODE_LPM flag.

Signed-off-by: Inki Dae <inki.dae@samsung.com>

diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c
index 6aa6a9e95570690360d191953d1566ad55227809..eb6dfe52cab24e1aa36ef12ee951c7c2d7103d6f 100644 (file)
--- a/drivers/gpu/drm/drm_mipi_dsi.c
+++ b/drivers/gpu/drm/drm_mipi_dsi.c
@@ -231,6 +231,9 @@ ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, const void *data,
                break;
        }
 
+       if (dsi->mode_flags & MIPI_DSI_MODE_LPM)
+               msg.flags = MIPI_DSI_MSG_USE_LPM;
+
        return ops->transfer(dsi->host, &msg);
 }
 EXPORT_SYMBOL(mipi_dsi_dcs_write);
@@ -260,6 +263,9 @@ ssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *dsi, u8 cmd, void *data,
        if (!ops || !ops->transfer)
                return -ENOSYS;
 
+       if (dsi->mode_flags & MIPI_DSI_MODE_LPM)
+               msg.flags = MIPI_DSI_MSG_USE_LPM;
+
        return ops->transfer(dsi->host, &msg);
 }
 EXPORT_SYMBOL(mipi_dsi_dcs_read);

diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
index 2bb55b8b90318c65eef80e2d511495e5731ae4e4..8569dc5a1026a2a986ca5d15bd7e9575dd19723d 100644 (file)
--- a/include/drm/drm_mipi_dsi.h
+++ b/include/drm/drm_mipi_dsi.h
@@ -96,6 +96,8 @@ void mipi_dsi_host_unregister(struct mipi_dsi_host *host);
 #define MIPI_DSI_MODE_EOT_PACKET       BIT(9)
 /* device supports non-continuous clock behavior (DSI spec 5.6.1) */
 #define MIPI_DSI_CLOCK_NON_CONTINUOUS  BIT(10)
+/* transmit data in low power */
+#define MIPI_DSI_MODE_LPM              BIT(11)
 
 enum mipi_dsi_pixel_format {
        MIPI_DSI_FMT_RGB888,