int i;
for (i = 0; i < 32; i++) {
- (*regs)[i] = tswapreg(env->gpr[i]);
+ (*regs)[i] = tswapreg(cpu_get_gpr(env, i));
}
(*regs)[32] = tswapreg(env->pc);
(*regs)[33] = tswapreg(cpu_get_sr(env));
case EXCP_SYSCALL:
env->pc += 4; /* 0xc00; */
ret = do_syscall(env,
- env->gpr[11], /* return value */
- env->gpr[3], /* r3 - r7 are params */
- env->gpr[4],
- env->gpr[5],
- env->gpr[6],
- env->gpr[7],
- env->gpr[8], 0, 0);
+ cpu_get_gpr(env, 11), /* return value */
+ cpu_get_gpr(env, 3), /* r3 - r7 are params */
+ cpu_get_gpr(env, 4),
+ cpu_get_gpr(env, 5),
+ cpu_get_gpr(env, 6),
+ cpu_get_gpr(env, 7),
+ cpu_get_gpr(env, 8), 0, 0);
if (ret == -TARGET_ERESTARTSYS) {
env->pc -= 4;
} else if (ret != -TARGET_QEMU_ESIGRETURN) {
- env->gpr[11] = ret;
+ cpu_set_gpr(env, 11, ret);
}
break;
case EXCP_DPF:
int i;
for (i = 0; i < 32; i++) {
- env->gpr[i] = regs->gpr[i];
+ cpu_set_gpr(env, i, regs->gpr[i]);
}
env->pc = regs->pc;
cpu_set_sr(env, regs->sr);
static inline void cpu_clone_regs(CPUOpenRISCState *env, target_ulong newsp)
{
if (newsp) {
- env->gpr[1] = newsp;
+ cpu_set_gpr(env, 1, newsp);
}
- env->gpr[11] = 0;
+ cpu_set_gpr(env, 11, 0);
}
static inline void cpu_set_tls(CPUOpenRISCState *env, target_ulong newtls)
{
- env->gpr[10] = newtls;
+ cpu_set_gpr(env, 10, newtls);
}
#endif
static inline abi_ulong get_sp_from_cpustate(CPUOpenRISCState *state)
{
- return state->gpr[1];
+ return cpu_get_gpr(state, 1);
}
CPUOpenRISCState *regs,
unsigned long mask)
{
- unsigned long usp = regs->gpr[1];
+ unsigned long usp = cpu_get_gpr(regs, 1);
/* copy the regs. they are first in sc so we can use sc directly */
CPUOpenRISCState *regs,
size_t frame_size)
{
- unsigned long sp = regs->gpr[1];
+ unsigned long sp = cpu_get_gpr(regs, 1);
int onsigstack = on_sig_stack(sp);
/* redzone */
__put_user(0, &frame->uc.tuc_link);
__put_user(target_sigaltstack_used.ss_sp,
&frame->uc.tuc_stack.ss_sp);
- __put_user(sas_ss_flags(env->gpr[1]), &frame->uc.tuc_stack.ss_flags);
+ __put_user(sas_ss_flags(cpu_get_gpr(env, 1)),
+ &frame->uc.tuc_stack.ss_flags);
__put_user(target_sigaltstack_used.ss_size,
&frame->uc.tuc_stack.ss_size);
setup_sigcontext(&frame->sc, env, set->sig[0]);
/* Set up registers for signal handler */
env->pc = (unsigned long)ka->_sa_handler; /* what we enter NOW */
- env->gpr[9] = (unsigned long)return_ip; /* what we enter LATER */
- env->gpr[3] = (unsigned long)sig; /* arg 1: signo */
- env->gpr[4] = (unsigned long)&frame->info; /* arg 2: (siginfo_t*) */
- env->gpr[5] = (unsigned long)&frame->uc; /* arg 3: ucontext */
+ cpu_set_gpr(env, 9, (unsigned long)return_ip); /* what we enter LATER */
+ cpu_set_gpr(env, 3, (unsigned long)sig); /* arg 1: signo */
+ cpu_set_gpr(env, 4, (unsigned long)&frame->info); /* arg 2: (siginfo_t*) */
+ cpu_set_gpr(env, 5, (unsigned long)&frame->uc); /* arg 3: ucontext */
/* actually move the usp to reflect the stacked frame */
- env->gpr[1] = (unsigned long)frame;
+ cpu_set_gpr(env, 1, (unsigned long)frame);
return;
s->exception_index = -1;
cpu->env.upr = UPR_UP | UPR_DMP | UPR_IMP | UPR_PICP | UPR_TTP;
- cpu->env.cpucfgr = CPUCFGR_OB32S | CPUCFGR_OF32S;
+ cpu->env.cpucfgr = CPUCFGR_OB32S | CPUCFGR_OF32S | CPUCFGR_NSGF;
cpu->env.dmmucfgr = (DMMUCFGR_NTW & (0 << 2)) | (DMMUCFGR_NTS & (6 << 2));
cpu->env.immucfgr = (IMMUCFGR_NTW & (0 << 2)) | (IMMUCFGR_NTS & (6 << 2));
{
OpenRISCCPU *cpu = OPENRISC_CPU(obj);
+ set_feature(cpu, OPENRISC_FEATURE_NSGF);
set_feature(cpu, OPENRISC_FEATURE_OB32S);
set_feature(cpu, OPENRISC_FEATURE_OF32S);
set_feature(cpu, OPENRISC_FEATURE_EVBAR);
{
OpenRISCCPU *cpu = OPENRISC_CPU(obj);
+ set_feature(cpu, OPENRISC_FEATURE_NSGF);
set_feature(cpu, OPENRISC_FEATURE_OB32S);
set_feature(cpu, OPENRISC_FEATURE_EVBAR);
}
#endif
typedef struct CPUOpenRISCState {
- target_ulong gpr[32]; /* General registers */
+ target_ulong shadow_gpr[16][32]; /* Shadow registers */
+
target_ulong pc; /* Program counter */
target_ulong ppc; /* Prev PC */
target_ulong jmp_pc; /* Jump PC */
#define TB_FLAGS_R0_0 2
#define TB_FLAGS_OVE SR_OVE
+static inline uint32_t cpu_get_gpr(const CPUOpenRISCState *env, int i)
+{
+ return env->shadow_gpr[0][i];
+}
+
+static inline void cpu_set_gpr(CPUOpenRISCState *env, int i, uint32_t val)
+{
+ env->shadow_gpr[0][i] = val;
+}
+
static inline void cpu_get_tb_cpu_state(CPUOpenRISCState *env,
target_ulong *pc,
target_ulong *cs_base, uint32_t *flags)
*pc = env->pc;
*cs_base = 0;
*flags = (env->dflag
- | (env->gpr[0] == 0 ? TB_FLAGS_R0_0 : 0)
+ | (cpu_get_gpr(env, 0) == 0 ? TB_FLAGS_R0_0 : 0)
| (env->sr & SR_OVE));
}
CPUOpenRISCState *env = &cpu->env;
if (n < 32) {
- return gdb_get_reg32(mem_buf, env->gpr[n]);
+ return gdb_get_reg32(mem_buf, cpu_get_gpr(env, n));
} else {
switch (n) {
case 32: /* PPC */
tmp = ldl_p(mem_buf);
if (n < 32) {
- env->gpr[n] = tmp;
+ cpu_set_gpr(env, n, tmp);
} else {
switch (n) {
case 32: /* PPC */
static const VMStateDescription vmstate_env = {
.name = "env",
- .version_id = 4,
- .minimum_version_id = 4,
+ .version_id = 5,
+ .minimum_version_id = 5,
.fields = (VMStateField[]) {
- VMSTATE_UINTTL_ARRAY(gpr, CPUOpenRISCState, 32),
+ VMSTATE_UINTTL_2DARRAY(shadow_gpr, CPUOpenRISCState, 16, 32),
VMSTATE_UINTTL(pc, CPUOpenRISCState),
VMSTATE_UINTTL(ppc, CPUOpenRISCState),
VMSTATE_UINTTL(jmp_pc, CPUOpenRISCState),
case TO_SPR(0, 64): /* ESR */
env->esr = rb;
break;
+
+ case TO_SPR(0, 1024) ... TO_SPR(0, 1024 + (16 * 32)): /* Shadow GPRs */
+ idx = (spr - 1024);
+ env->shadow_gpr[idx / 32][idx % 32] = rb;
+
case TO_SPR(1, 512) ... TO_SPR(1, 512+DTLB_SIZE-1): /* DTLBW0MR 0-127 */
idx = spr - TO_SPR(1, 512);
if (!(rb & 1)) {
case TO_SPR(0, 129): /* NUMCORES */
return 1;
+ case TO_SPR(0, 1024) ... TO_SPR(0, 1024 + (16 * 32)): /* Shadow GPRs */
+ idx = (spr - 1024);
+ return env->shadow_gpr[idx / 32][idx % 32];
+
case TO_SPR(1, 512) ... TO_SPR(1, 512+DTLB_SIZE-1): /* DTLBW0MR 0-127 */
idx = spr - TO_SPR(1, 512);
return env->tlb->dtlb[0][idx].mr;
"mac");
for (i = 0; i < 32; i++) {
cpu_R[i] = tcg_global_mem_new(cpu_env,
- offsetof(CPUOpenRISCState, gpr[i]),
+ offsetof(CPUOpenRISCState,
+ shadow_gpr[0][i]),
regnames[i]);
}
cpu_R0 = cpu_R[0];
cpu_fprintf(f, "PC=%08x\n", env->pc);
for (i = 0; i < 32; ++i) {
- cpu_fprintf(f, "R%02d=%08x%c", i, env->gpr[i],
+ cpu_fprintf(f, "R%02d=%08x%c", i, cpu_get_gpr(env, i),
(i % 4) == 3 ? '\n' : ' ');
}
}