Inlining will result in back-to-back mtc0 mfc0 instructions. Break the

hazard by using back_to_back_c0_hazard().

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c
index 060722e42c53f9e8aac2f268dea306e4219a0465..31c38c4971c0ab48f931d4f0e4f030fc4ea06ee8 100644 (file)
--- a/arch/mips/kernel/irq_cpu.c
+++ b/arch/mips/kernel/irq_cpu.c
@@ -55,6 +55,7 @@ static inline void mips_cpu_irq_enable(unsigned int irq)
 
        local_irq_save(flags);
        unmask_mips_irq(irq);
+       back_to_back_c0_hazard();
        local_irq_restore(flags);
 }
 
@@ -64,6 +65,7 @@ static void mips_cpu_irq_disable(unsigned int irq)
 
        local_irq_save(flags);
        mask_mips_irq(irq);
+       back_to_back_c0_hazard();
        local_irq_restore(flags);
 }