drm/msm/a6xx: skip HFI set freq if GMU is powered down

Also skip the newly added HFI set freq path if the GMU is powered down,
which was missing because of patches crossing paths.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Rob Clark <robdclark@chromium.org>

diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
index c5e21b53c4d055a07e6d861209059fe5128e9fef..096be97ce9f961583d407afaa83320bfeadc74fb 100644 (file)
--- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
@@ -110,13 +110,6 @@ static void __a6xx_gmu_set_freq(struct a6xx_gmu *gmu, int index)
        struct msm_gpu *gpu = &adreno_gpu->base;
        int ret;
 
-       /*
-        * This can get called from devfreq while the hardware is idle. Don't
-        * bring up the power if it isn't already active
-        */
-       if (pm_runtime_get_if_in_use(gmu->dev) == 0)
-               return;
-
        gmu_write(gmu, REG_A6XX_GMU_DCVS_ACK_OPTION, 0);
 
        gmu_write(gmu, REG_A6XX_GMU_DCVS_PERF_SETTING,
@@ -141,7 +134,6 @@ static void __a6xx_gmu_set_freq(struct a6xx_gmu *gmu, int index)
         * for now leave it at max so that the performance is nominal.
         */
        icc_set_bw(gpu->icc_path, 0, MBps_to_icc(7216));
-       pm_runtime_put(gmu->dev);
 }
 
 void a6xx_gmu_set_freq(struct msm_gpu *gpu, unsigned long freq)
@@ -159,13 +151,21 @@ void a6xx_gmu_set_freq(struct msm_gpu *gpu, unsigned long freq)
                        break;
 
        gmu->current_perf_index = perf_index;
+       gmu->freq = gmu->gpu_freqs[perf_index];
+
+       /*
+        * This can get called from devfreq while the hardware is idle. Don't
+        * bring up the power if it isn't already active
+        */
+       if (pm_runtime_get_if_in_use(gmu->dev) == 0)
+               return;
 
        if (gmu->legacy)
                __a6xx_gmu_set_freq(gmu, perf_index);
        else
                a6xx_hfi_set_freq(gmu, perf_index);
 
-       gmu->freq = gmu->gpu_freqs[perf_index];
+       pm_runtime_put(gmu->dev);
 }
 
 unsigned long a6xx_gmu_get_freq(struct msm_gpu *gpu)