#include "sysemu/kvm.h"
#include "hw/virtio/virtio-bus.h"
#include "qemu/error-report.h"
-
-/* #define DEBUG_VIRTIO_MMIO */
-
-#ifdef DEBUG_VIRTIO_MMIO
-
-#define DPRINTF(fmt, ...) \
-do { printf("virtio_mmio: " fmt , ## __VA_ARGS__); } while (0)
-#else
-#define DPRINTF(fmt, ...) do {} while (0)
-#endif
+#include "qemu/log.h"
+#include "trace.h"
/* QOM macros */
/* virtio-mmio-bus */
VirtIOMMIOProxy *proxy = (VirtIOMMIOProxy *)opaque;
VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
- DPRINTF("virtio_mmio_read offset 0x%x\n", (int)offset);
+ trace_virtio_mmio_read(offset);
if (!vdev) {
/* If no backend is present, we treat most registers as
}
}
if (size != 4) {
- DPRINTF("wrong size access to register!\n");
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: wrong size access to register!\n",
+ __func__);
return 0;
}
switch (offset) {
case VIRTIO_MMIO_QUEUE_ALIGN:
case VIRTIO_MMIO_QUEUE_NOTIFY:
case VIRTIO_MMIO_INTERRUPT_ACK:
- DPRINTF("read of write-only register\n");
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: read of write-only register\n",
+ __func__);
return 0;
default:
- DPRINTF("bad register offset\n");
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: bad register offset\n", __func__);
return 0;
}
return 0;
VirtIOMMIOProxy *proxy = (VirtIOMMIOProxy *)opaque;
VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
- DPRINTF("virtio_mmio_write offset 0x%x value 0x%" PRIx64 "\n",
- (int)offset, value);
+ trace_virtio_mmio_write_offset(offset, value);
if (!vdev) {
/* If no backend is present, we just make all registers
return;
}
if (size != 4) {
- DPRINTF("wrong size access to register!\n");
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: wrong size access to register!\n",
+ __func__);
return;
}
switch (offset) {
if (proxy->guest_page_shift > 31) {
proxy->guest_page_shift = 0;
}
- DPRINTF("guest page size %" PRIx64 " shift %d\n", value,
- proxy->guest_page_shift);
+ trace_virtio_mmio_guest_page(value, proxy->guest_page_shift);
break;
case VIRTIO_MMIO_QUEUE_SEL:
if (value < VIRTIO_QUEUE_MAX) {
}
break;
case VIRTIO_MMIO_QUEUE_NUM:
- DPRINTF("mmio_queue write %d max %d\n", (int)value, VIRTQUEUE_MAX_SIZE);
+ trace_virtio_mmio_queue_write(value, VIRTQUEUE_MAX_SIZE);
virtio_queue_set_num(vdev, vdev->queue_sel, value);
/* Note: only call this function for legacy devices */
virtio_queue_update_rings(vdev, vdev->queue_sel);
case VIRTIO_MMIO_DEVICE_FEATURES:
case VIRTIO_MMIO_QUEUE_NUM_MAX:
case VIRTIO_MMIO_INTERRUPT_STATUS:
- DPRINTF("write to readonly register\n");
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: write to readonly register\n",
+ __func__);
break;
default:
- DPRINTF("bad register offset\n");
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: bad register offset\n", __func__);
}
}
return;
}
level = (atomic_read(&vdev->isr) != 0);
- DPRINTF("virtio_mmio setting IRQ %d\n", level);
+ trace_virtio_mmio_setting_irq(level);
qemu_set_irq(proxy->irq, level);
}