target-mips: Add enum for BREAK32

Add enum for BREAK32

Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>

diff --git a/target-mips/translate.c b/target-mips/translate.c
index a10bfa3a79b4527236345c007376d1ae2eb6502d..3105c7f175dbb1958373cac8d5bd8219e6639280 100644 (file)
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -12009,6 +12009,7 @@ enum {
     MODU = 0x7,
 
     /* The following can be distinguished by their lower 6 bits. */
+    BREAK32 = 0x07,
     INS = 0x0c,
     LSA = 0x0f,
     ALIGN = 0x1f,
@@ -13629,7 +13630,7 @@ static void decode_micromips32_opc(CPUMIPSState *env, DisasContext *ctx)
         case POOL32AXF:
             gen_pool32axf(env, ctx, rt, rs);
             break;
-        case 0x07:
+        case BREAK32:
             generate_exception_end(ctx, EXCP_BREAK);
             break;
         default: