ARM: dts: at91: sama7g5ek: to not touch slew-rate for SDMMC pins

With commit c709135e576b ("pinctrl: at91-pio4: add support for slew-rate")
and commit cbde6c823bfa ("pinctrl: at91-pio4: Fix slew rate disablement")
the slew-rate is enabled by default for each configured pin. The datasheet
specifies at chapter "Output Driver AC Characteristics" that HSIO
drivers (use in SDMMCx and QSPI0 peripherals), don't have a slewrate
setting but are rather calibrated against an external 1% resistor mounted
on the SDMMCx_CAL or QSPI0_CAL pins. Depending on the target signal
frequency and the external load, it is possible to adjust their target
output impedance. Thus set slew-rate = <0> for SDMMC (QSPI is not enabled
at the moment in device tree).

Fixes: 7540629e2fc7 ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210915074836.6574-3-claudiu.beznea@microchip.com

diff --git a/arch/arm/boot/dts/at91-sama7g5ek.dts b/arch/arm/boot/dts/at91-sama7g5ek.dts
index 30b67cad5f14fc7bddafa4bb5c83e504f8577886..f3d6aaa3a78dc54e0fb706c36f98613a8cf86483 100644 (file)
--- a/arch/arm/boot/dts/at91-sama7g5ek.dts
+++ b/arch/arm/boot/dts/at91-sama7g5ek.dts
@@ -558,6 +558,7 @@
                                 <PIN_PA8__SDMMC0_DAT5>,
                                 <PIN_PA9__SDMMC0_DAT6>,
                                 <PIN_PA10__SDMMC0_DAT7>;
+                       slew-rate = <0>;
                        bias-pull-up;
                };
 
@@ -565,6 +566,7 @@
                        pinmux = <PIN_PA0__SDMMC0_CK>,
                                 <PIN_PA2__SDMMC0_RSTN>,
                                 <PIN_PA11__SDMMC0_DS>;
+                       slew-rate = <0>;
                        bias-pull-up;
                };
        };
@@ -576,6 +578,7 @@
                                 <PIN_PC0__SDMMC1_DAT1>,
                                 <PIN_PC1__SDMMC1_DAT2>,
                                 <PIN_PC2__SDMMC1_DAT3>;
+                       slew-rate = <0>;
                        bias-pull-up;
                };
 
@@ -584,6 +587,7 @@
                                 <PIN_PB28__SDMMC1_RSTN>,
                                 <PIN_PC5__SDMMC1_1V8SEL>,
                                 <PIN_PC4__SDMMC1_CD>;
+                       slew-rate = <0>;
                        bias-pull-up;
                };
        };
@@ -595,11 +599,13 @@
                                 <PIN_PD6__SDMMC2_DAT1>,
                                 <PIN_PD7__SDMMC2_DAT2>,
                                 <PIN_PD8__SDMMC2_DAT3>;
+                       slew-rate = <0>;
                        bias-pull-up;
                };
 
                ck {
                        pinmux = <PIN_PD4__SDMMC2_CK>;
+                       slew-rate = <0>;
                        bias-pull-up;
                };
        };