spi: mchp-pci1xxxx: Fix length of SPI transactions not set properly in driver

BugLink: https://bugs.launchpad.net/bugs/2025067
[ Upstream commit 35c8c5e503a82e0a4bf251d32096211eba8c2be6 ]

In pci1xxxx_spi_transfer_one API, length of SPI transaction gets cleared
by setting of length mask. Set length of transaction only after masking
length field.

Fixes: 1cc0cbea7167 ("spi: microchip: pci1xxxx: Add driver for SPI controller of PCI1XXXX PCIe switch")
Signed-off-by: Tharun Kumar P <tharunkumar.pasumarthi@microchip.com>
Link: https://lore.kernel.org/r/20230404171613.1336093-2-tharunkumar.pasumarthi@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Signed-off-by: Kamal Mostafa <kamal@canonical.com>
Signed-off-by: Stefan Bader <stefan.bader@canonical.com>

diff --git a/drivers/spi/spi-pci1xxxx.c b/drivers/spi/spi-pci1xxxx.c
index a31c3b612a430707ce386626f45ef29e00e88425..0805c441b40651f3f213fee1a833bcaba651e233 100644 (file)
--- a/drivers/spi/spi-pci1xxxx.c
+++ b/drivers/spi/spi-pci1xxxx.c
@@ -199,8 +199,9 @@ static int pci1xxxx_spi_transfer_one(struct spi_controller *spi_ctlr,
                        else
                                regval &= ~SPI_MST_CTL_MODE_SEL;
 
-                       regval |= ((clkdiv << 5) | SPI_FORCE_CE | (len << 8));
+                       regval |= ((clkdiv << 5) | SPI_FORCE_CE);
                        regval &= ~SPI_MST_CTL_CMD_LEN_MASK;
+                       regval |= (len << 8);
                        writel(regval, par->reg_base +
                               SPI_MST_CTL_REG_OFFSET(p->hw_inst));
                        regval = readl(par->reg_base +