]> git.proxmox.com Git - mirror_ubuntu-hirsute-kernel.git/commitdiff
drm/amdgpu: Use optimal mtypes and PTE bits for Arcturus
authorFelix Kuehling <Felix.Kuehling@amd.com>
Mon, 26 Aug 2019 22:46:28 +0000 (18:46 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 13 Sep 2019 22:36:01 +0000 (17:36 -0500)
For compute VRAM allocations on Arturus use the new RW mtype
for non-coherent local memory, CC mtype for coherent local
memory and PTE_SNOOPED bit for invalidating non-dirty cache
lines on remote XGMI mappings.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Tested-by: Amber Lin <Amber.Lin@amd.com>
Reviewed-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

index c41ac2a310342eb82898e1a29606618c799e3d67..f8328e069d94fb389d47f24d55836f467806bebf 100644 (file)
@@ -358,6 +358,7 @@ static int vm_update_pds(struct amdgpu_vm *vm, struct amdgpu_sync *sync)
 
 static uint64_t get_pte_flags(struct amdgpu_device *adev, struct kgd_mem *mem)
 {
+       struct amdgpu_device *bo_adev = amdgpu_ttm_adev(mem->bo->tbo.bdev);
        bool coherent = mem->alloc_flags & ALLOC_MEM_FLAGS_COHERENT;
        uint32_t mapping_flags;
 
@@ -367,8 +368,23 @@ static uint64_t get_pte_flags(struct amdgpu_device *adev, struct kgd_mem *mem)
        if (mem->alloc_flags & ALLOC_MEM_FLAGS_EXECUTABLE)
                mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE;
 
-       mapping_flags |= coherent ?
-               AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
+       switch (adev->asic_type) {
+       case CHIP_ARCTURUS:
+               if (mem->alloc_flags & ALLOC_MEM_FLAGS_VRAM) {
+                       if (bo_adev == adev)
+                               mapping_flags |= coherent ?
+                                       AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW;
+                       else
+                               mapping_flags |= AMDGPU_VM_MTYPE_UC;
+               } else {
+                       mapping_flags |= coherent ?
+                               AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
+               }
+               break;
+       default:
+               mapping_flags |= coherent ?
+                       AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
+       }
 
        return amdgpu_gmc_get_pte_flags(adev, mapping_flags);
 }
index e2fb141ff2e566bec9017a18bdc2d909a00c72b7..4fd245438c77e0eba9c9805f112c44079a93c094 100644 (file)
@@ -1592,6 +1592,10 @@ static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev,
                }
                flags &= ~AMDGPU_PTE_VALID;
        }
+       if (adev->asic_type == CHIP_ARCTURUS &&
+           !(flags & AMDGPU_PTE_SYSTEM) &&
+           mapping->bo_va->is_xgmi)
+               flags |= AMDGPU_PTE_SNOOPED;
 
        trace_amdgpu_vm_bo_update(mapping);