clk: renesas: r8a77965: Add TMU clocks

This patch adds TMU{0,1,2,3,4} clocks.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20201209195343.803120-4-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c
index 2b55a06ac5cf238f8a976789c068de00916480c5..46a157732759c394d535d420f9118991d887462d 100644 (file)
--- a/drivers/clk/renesas/r8a77965-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c
@@ -123,6 +123,11 @@ static const struct cpg_core_clk r8a77965_core_clks[] __initconst = {
 
 static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = {
        DEF_MOD("fdp1-0",               119,    R8A77965_CLK_S0D1),
+       DEF_MOD("tmu4",                 121,    R8A77965_CLK_S0D6),
+       DEF_MOD("tmu3",                 122,    R8A77965_CLK_S3D2),
+       DEF_MOD("tmu2",                 123,    R8A77965_CLK_S3D2),
+       DEF_MOD("tmu1",                 124,    R8A77965_CLK_S3D2),
+       DEF_MOD("tmu0",                 125,    R8A77965_CLK_CP),
        DEF_MOD("scif5",                202,    R8A77965_CLK_S3D4),
        DEF_MOD("scif4",                203,    R8A77965_CLK_S3D4),
        DEF_MOD("scif3",                204,    R8A77965_CLK_S3D4),