]> git.proxmox.com Git - mirror_ubuntu-hirsute-kernel.git/commitdiff
ARM: dts: Update ti-sysc data for existing users
authorTony Lindgren <tony@atomide.com>
Fri, 12 Jan 2018 00:04:03 +0000 (16:04 -0800)
committerTony Lindgren <tony@atomide.com>
Fri, 12 Jan 2018 23:16:57 +0000 (15:16 -0800)
Let's update the existing users with features and clock data as
specified in the binding. This is currently the smartreflex for most
part, and also few omap4 modules with no child device driver like
mcasp, abe iss and gfx.

Note that we had few mistakes that did not get noticed as we're still
probing the SmartReflex driver with legacy platform data and using
"ti,hwmods" legacy property for ti-sysc driver.

So let's fix the omap4 and dra7 smartreflex registers as there is no
no revision register.

And on omap4, the mcasp module has a revision register according to
the TRM.

And for omap34xx we need a different configuration compared to 36xx.
And the smartreflex on 3517 we've always kept disabled so let's
remove any references to it.

Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/boot/dts/am3517.dtsi
arch/arm/boot/dts/dra7.dtsi
arch/arm/boot/dts/omap3.dtsi
arch/arm/boot/dts/omap34xx.dtsi
arch/arm/boot/dts/omap36xx.dtsi
arch/arm/boot/dts/omap4.dtsi

index 00da3f2c4072d4d6a3a370e88b1acfa046b58efd..0f0117b72e14ae4b642c9440d3cf5433688a883b 100644 (file)
@@ -99,9 +99,5 @@
        status = "disabled";
 };
 
-&smartreflex_mpu_iva {
-       status = "disabled";
-};
-
 /include/ "am35xx-clocks.dtsi"
 /include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"
index a1d7178a3966e9d992b44cddd8f6af16b140a125..2b0a541f7f1dcaffcfdeb56305319680a4d72cf8 100644 (file)
@@ -7,6 +7,8 @@
  * Based on "omap4.dtsi"
  */
 
+#include <dt-bindings/bus/ti-sysc.h>
+#include <dt-bindings/clock/dra7.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/pinctrl/dra.h>
 #include <dt-bindings/clock/dra7.h>
                target-module@4a0dd000 {
                        compatible = "ti,sysc-omap4-sr";
                        ti,hwmods = "smartreflex_core";
-                       reg = <0x4a0dd000 0x4>,
-                             <0x4a0dd008 0x4>;
-                       reg-names = "rev", "sysc";
+                       reg = <0x4a0dd038 0x4>;
+                       reg-names = "sysc";
+                       ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       clocks = <&coreaon_clkctrl DRA7_SMARTREFLEX_CORE_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0 0x4a0dd000 0x001000>;
                target-module@4a0d9000 {
                        compatible = "ti,sysc-omap4-sr";
                        ti,hwmods = "smartreflex_mpu";
-                       reg = <0x4a0d9000 0x4>,
-                             <0x4a0d9008 0x4>;
-                       reg-names = "rev", "sysc";
+                       reg = <0x4a0d9038 0x4>;
+                       reg-names = "sysc";
+                       ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       clocks = <&coreaon_clkctrl DRA7_SMARTREFLEX_MPU_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0 0x4a0d9000 0x001000>;
index a5c2440c7051078b3eaa0bada13b1a1630690040..2ce18785594f521d35f3c3ea7e542fd7f5577bfe 100644 (file)
                        dma-names = "rx";
                };
 
-               smartreflex_core: smartreflex@480cb000 {
-                       compatible = "ti,omap3-smartreflex-core";
-                       ti,hwmods = "smartreflex_core";
-                       reg = <0x480cb000 0x400>;
-                       interrupts = <19>;
-               };
-
-               smartreflex_mpu_iva: smartreflex@480c9000 {
-                       compatible = "ti,omap3-smartreflex-mpu-iva";
-                       ti,hwmods = "smartreflex_mpu_iva";
-                       reg = <0x480c9000 0x400>;
-                       interrupts = <18>;
-               };
-
                timer1: timer@48318000 {
                        compatible = "ti,omap3430-timer";
                        reg = <0x48318000 0x400>;
index ac4f8795b756f597356d5776475d811f93483e62..f572a477f74ca2a5c7d1538d9582fc6fc5202917 100644 (file)
@@ -8,6 +8,7 @@
  * kind, whether express or implied.
  */
 
+#include <dt-bindings/bus/ti-sysc.h>
 #include <dt-bindings/media/omap3-isp.h>
 
 #include "omap3.dtsi"
                        compatible = "ti,omap34xx-bandgap";
                        #thermal-sensor-cells = <0>;
                };
+
+               target-module@480cb000 {
+                       compatible = "ti,sysc-omap3430-sr", "ti,sysc";
+                       ti,hwmods = "smartreflex_core";
+                       reg = <0x480cb024 0x4>;
+                       reg-names = "sysc";
+                       ti,sysc-mask = <SYSC_OMAP2_CLOCKACTIVITY>;
+                       clocks = <&sr2_fck>;
+                       clock-names = "fck";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0 0x480cb000 0x001000>;
+
+                       smartreflex_core: smartreflex@0 {
+                               compatible = "ti,omap3-smartreflex-core";
+                               reg = <0 0x400>;
+                               interrupts = <19>;
+                       };
+               };
+
+               target-module@480c9000 {
+                       compatible = "ti,sysc-omap3430-sr", "ti,sysc";
+                       ti,hwmods = "smartreflex_mpu_iva";
+                       reg = <0x480c9024 0x4>;
+                       reg-names = "sysc";
+                       ti,sysc-mask = <SYSC_OMAP2_CLOCKACTIVITY>;
+                       clocks = <&sr1_fck>;
+                       clock-names = "fck";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0 0x480c9000 0x001000>;
+
+                       smartreflex_mpu_iva: smartreflex@480c9000 {
+                               compatible = "ti,omap3-smartreflex-mpu-iva";
+                               reg = <0 0x400>;
+                               interrupts = <18>;
+                       };
+               };
        };
 
        thermal_zones: thermal-zones {
index ade31d74c70c9aaa30e9963625055265658d4cd4..6fb23ada1f64dea9e6ad91701c78a5c2a50725d2 100644 (file)
@@ -8,6 +8,7 @@
  * kind, whether express or implied.
  */
 
+#include <dt-bindings/bus/ti-sysc.h>
 #include <dt-bindings/media/omap3-isp.h>
 
 #include "omap3.dtsi"
                        compatible = "ti,omap36xx-bandgap";
                        #thermal-sensor-cells = <0>;
                };
+
+               target-module@480cb000 {
+                       compatible = "ti,sysc-omap3630-sr", "ti,sysc";
+                       ti,hwmods = "smartreflex_core";
+                       reg = <0x480cb038 0x4>;
+                       reg-names = "sysc";
+                       ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>;
+                       clocks = <&sr2_fck>;
+                       clock-names = "fck";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0 0x480cb000 0x001000>;
+
+                       smartreflex_core: smartreflex@0 {
+                               compatible = "ti,omap3-smartreflex-core";
+                               reg = <0 0x400>;
+                               interrupts = <19>;
+                       };
+               };
+
+               target-module@480c9000 {
+                       compatible = "ti,sysc-omap3630-sr", "ti,sysc";
+                       ti,hwmods = "smartreflex_mpu_iva";
+                       reg = <0x480c9038 0x4>;
+                       reg-names = "sysc";
+                       ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>;
+                       clocks = <&sr1_fck>;
+                       clock-names = "fck";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0 0x480c9000 0x001000>;
+
+
+                       smartreflex_mpu_iva: smartreflex@480c9000 {
+                               compatible = "ti,omap3-smartreflex-mpu-iva";
+                               reg = <0 0x400>;
+                               interrupts = <18>;
+                       };
+               };
        };
 
        thermal_zones: thermal-zones {
index e912639c998abea616196817bd63babbf8878fed..6425902f7ae7b78397bd73d004a9939c9438e3dd 100644 (file)
@@ -6,6 +6,8 @@
  * published by the Free Software Foundation.
  */
 
+#include <dt-bindings/bus/ti-sysc.h>
+#include <dt-bindings/clock/omap4.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/pinctrl/omap.h>
                        reg = <0x48076000 0x4>,
                              <0x48076010 0x4>;
                        reg-names = "rev", "sysc";
+                       ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       clocks = <&l4_per_clkctrl OMAP4_SLIMBUS2_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0 0x48076000 0x001000>;
                target-module@4a0db000 {
                        compatible = "ti,sysc-sr";
                        ti,hwmods = "smartreflex_iva";
-                       reg = <0x4a0db000 0x4>,
-                             <0x4a0db008 0x4>;
-                       reg-names = "rev", "sysc";
+                       reg = <0x4a0db038 0x4>;
+                       reg-names = "sysc";
+                       ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_IVA_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0 0x4a0db000 0x001000>;
                target-module@4a0dd000 {
                        compatible = "ti,sysc-sr";
                        ti,hwmods = "smartreflex_core";
-                       reg = <0x4a0dd000 0x4>,
-                             <0x4a0dd008 0x4>;
-                       reg-names = "rev", "sysc";
+                       reg = <0x4a0dd038 0x4>;
+                       reg-names = "sysc";
+                       ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_CORE_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0 0x4a0dd000 0x001000>;
                target-module@4a0d9000 {
                        compatible = "ti,sysc-sr";
                        ti,hwmods = "smartreflex_mpu";
-                       reg = <0x4a0d9000 0x4>,
-                             <0x4a0d9008 0x4>;
-                       reg-names = "rev", "sysc";
+                       reg = <0x4a0d9038 0x4>;
+                       reg-names = "sysc";
+                       ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_MPU_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0 0x4a0d9000 0x001000>;
                        reg = <0x52000000 0x4>,
                              <0x52000010 0x4>;
                        reg-names = "rev", "sysc";
+                       ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
+                       ti,sysc-midle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       ti,sysc-delay-us = <2>;
+                       clocks = <&iss_clkctrl OMAP4_ISS_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0 0x52000000 0x1000000>;
                target-module@40128000 {
                        compatible = "ti,sysc-mcasp";
                        ti,hwmods = "mcasp";
-                       reg = <0x40128004 0x4>;
-                       reg-names = "sysc";
+                       reg = <0x40128000 0x4>,
+                             <0x40128004 0x4>;
+                       reg-names = "rev", "sysc";
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       clocks = <&abe_clkctrl OMAP4_MCASP_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0x00000000 0x40128000 0x1000>, /* MPU */
                        reg = <0x4012c000 0x4>,
                              <0x4012c010 0x4>;
                        reg-names = "rev", "sysc";
+                       ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       clocks = <&abe_clkctrl OMAP4_SLIMBUS1_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0x00000000 0x4012c000 0x1000>, /* MPU */
                        reg = <0x401f1000 0x4>,
                              <0x401f1010 0x4>;
                        reg-names = "rev", "sysc";
+                       ti,sysc-midle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>;
+                       clocks = <&abe_clkctrl OMAP4_AESS_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0x00000000 0x401f1000 0x1000>, /* MPU */
                        reg = <0x4a10a000 0x4>,
                              <0x4a10a010 0x4>;
                        reg-names = "rev", "sysc";
+                       ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
+                       ti,sysc-midle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>;
+                       ti,sysc-delay-us = <2>;
+                       clocks = <&iss_clkctrl OMAP4_FDIF_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0 0x4a10a000 0x1000>;
                        reg = <0x5601fc00 0x4>,
                              <0x5601fc10 0x4>;
                        reg-names = "rev", "sysc";
+                       ti,sysc-midle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       clocks = <&l3_gfx_clkctrl OMAP4_GPU_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0 0x56000000 0x2000000>;