dmaengine: at_hdmac: Extend the Flow Controller bitfield to three bits

Some chips have two bits (e.g SAMA5D3), and some have three (e.g.
SAM9G45). A field width of three is compatible as long as valid
values are used for the different chips.

There is no current use of any value needing three bits, so the
fixed bug is relatively benign.

Fixes: d8840a7edcf0 ("dmaengine: at_hdmac: Use bitfield access macros")
Cc: stable@vger.kernel.org
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Peter Rosin <peda@axentia.se>
Link: https://lore.kernel.org/r/e2c898ba-c3a3-5dd3-384b-0585661c79f2@axentia.se
Signed-off-by: Vinod Koul <vkoul@kernel.org>

diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c
index 6362013b90df1c3d26c1b7959f46289b4aafae1c..ee3a219e3a897c56ac69d7a902ef90ccc0262822 100644 (file)
--- a/drivers/dma/at_hdmac.c
+++ b/drivers/dma/at_hdmac.c
@@ -132,7 +132,7 @@
 #define ATC_DST_PIP            BIT(12)         /* Destination Picture-in-Picture enabled */
 #define ATC_SRC_DSCR_DIS       BIT(16)         /* Src Descriptor fetch disable */
 #define ATC_DST_DSCR_DIS       BIT(20)         /* Dst Descriptor fetch disable */
-#define ATC_FC                 GENMASK(22, 21) /* Choose Flow Controller */
+#define ATC_FC                 GENMASK(23, 21) /* Choose Flow Controller */
 #define ATC_FC_MEM2MEM         0x0             /* Mem-to-Mem (DMA) */
 #define ATC_FC_MEM2PER         0x1             /* Mem-to-Periph (DMA) */
 #define ATC_FC_PER2MEM         0x2             /* Periph-to-Mem (DMA) */