Several QOM type names contain ',':
ARM,bitband-memory
etraxfs,pic
etraxfs,serial
etraxfs,timer
fsl,imx25
fsl,imx31
fsl,imx6
fsl,imx6ul
fsl,imx7
grlib,ahbpnp
grlib,apbpnp
grlib,apbuart
grlib,gptimer
grlib,irqmp
qemu,register
SUNW,bpp
SUNW,CS4231
SUNW,DBRI
SUNW,DBRI.prom
SUNW,fdtwo
SUNW,sx
SUNW,tcx
xilinx,zynq_slcr
xlnx,zynqmp
xlnx,zynqmp-pmu-soc
xlnx,zynq-xadc
These are all device types. They can't be plugged with -device /
device_add, except for xlnx,zynqmp-pmu-soc, and I doubt that one
actually works.
They *can* be used with -device / device_add to request help.
Usability is poor, though: you have to double the comma, like this:
$ qemu-system-x86_64 -device SUNW,,fdtwo,help
Trap for the unwary. The fact that this was broken in
device-introspect-test for more than six years until commit
e27bd49876
fixed it demonstrates that "the unwary" includes seasoned developers.
One QOM type name contains ' ': "ICH9 SMB". Because having to
remember just one way to quote would be too easy.
Rename the "SUNW,FOO types to "sun-FOO". Summarily replace ',' and '
' by '-' in the other type names.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20210304140229.575481-2-armbru@redhat.com>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
clock_set_hz(zynq_machine->ps_clk, PS_CLK_FREQUENCY);
/* Create slcr, keep a pointer to connect clocks */
- slcr = qdev_new("xilinx,zynq_slcr");
+ slcr = qdev_new("xilinx-zynq_slcr");
qdev_connect_clock_in(slcr, "ps_clk", zynq_machine->ps_clk);
sysbus_realize_and_unref(SYS_BUS_DEVICE(slcr), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(slcr), 0, 0xF8000000);
#define CS_DREGS 32
#define CS_MAXDREG (CS_DREGS - 1)
-#define TYPE_CS4231 "SUNW,CS4231"
+#define TYPE_CS4231 "sun-CS4231"
typedef struct CSState CSState;
DECLARE_INSTANCE_CHECKER(CSState, CS4231,
TYPE_CS4231)
DeviceState *dev;
FDCtrlSysBus *sys;
- dev = qdev_new("SUNW,fdtwo");
+ dev = qdev_new("sun-fdtwo");
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
sys = SYSBUS_FDC(dev);
sysbus_connect_irq(SYS_BUS_DEVICE(sys), 0, irq);
}
static const TypeInfo sun4m_fdc_info = {
- .name = "SUNW,fdtwo",
+ .name = "sun-fdtwo",
.parent = TYPE_SYSBUS_FDC,
.instance_init = sun4m_fdc_initfn,
.class_init = sun4m_fdc_class_init,
#define STAT_TR_IDLE 22
#define STAT_TR_RDY 24
-#define TYPE_ETRAX_FS_SERIAL "etraxfs,serial"
+#define TYPE_ETRAX_FS_SERIAL "etraxfs-serial"
typedef struct ETRAXSerial ETRAXSerial;
DECLARE_INSTANCE_CHECKER(ETRAXSerial, ETRAX_SERIAL,
TYPE_ETRAX_FS_SERIAL)
&gpio_state.iomem);
- dev = qdev_new("etraxfs,pic");
+ dev = qdev_new("etraxfs-pic");
s = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(s, &error_fatal);
sysbus_mmio_map(s, 0, 0x3001c000);
}
/* 2 timers. */
- sysbus_create_varargs("etraxfs,timer", 0x3001e000, irq[0x1b], nmi[1], NULL);
- sysbus_create_varargs("etraxfs,timer", 0x3005e000, irq[0x1b], nmi[1], NULL);
+ sysbus_create_varargs("etraxfs-timer", 0x3001e000, irq[0x1b], nmi[1], NULL);
+ sysbus_create_varargs("etraxfs-timer", 0x3005e000, irq[0x1b], nmi[1], NULL);
for (i = 0; i < 4; i++) {
etraxfs_ser_create(0x30026000 + i * 0x2000, irq[0x14 + i], serial_hd(i));
#define TCX_THC_CURSMASK 0x900
#define TCX_THC_CURSBITS 0x980
-#define TYPE_TCX "SUNW,tcx"
+#define TYPE_TCX "sun-tcx"
OBJECT_DECLARE_SIMPLE_TYPE(TCXState, TCX)
struct TCXState {
#define R_R_GURU 4
#define R_MAX 5
-#define TYPE_ETRAX_FS_PIC "etraxfs,pic"
+#define TYPE_ETRAX_FS_PIC "etraxfs-pic"
DECLARE_INSTANCE_CHECKER(struct etrax_pic, ETRAX_FS_PIC,
TYPE_ETRAX_FS_PIC)
/* Define the PMU device */
-#define TYPE_XLNX_ZYNQMP_PMU_SOC "xlnx,zynqmp-pmu-soc"
+#define TYPE_XLNX_ZYNQMP_PMU_SOC "xlnx-zynqmp-pmu-soc"
OBJECT_DECLARE_SIMPLE_TYPE(XlnxZynqMPPMUSoCState, XLNX_ZYNQMP_PMU_SOC)
#define XLNX_ZYNQMP_PMU_ROM_SIZE 0x8000
#define ZYNQ_SLCR_MMIO_SIZE 0x1000
#define ZYNQ_SLCR_NUM_REGS (ZYNQ_SLCR_MMIO_SIZE / 4)
-#define TYPE_ZYNQ_SLCR "xilinx,zynq_slcr"
+#define TYPE_ZYNQ_SLCR "xilinx-zynq_slcr"
OBJECT_DECLARE_SIMPLE_TYPE(ZynqSLCRState, ZYNQ_SLCR)
struct ZynqSLCRState {
DeviceState *dev;
SysBusDevice *s;
- dev = qdev_new("SUNW,tcx");
+ dev = qdev_new("sun-tcx");
qdev_prop_set_uint32(dev, "vram_size", vram_size);
qdev_prop_set_uint16(dev, "width", width);
qdev_prop_set_uint16(dev, "height", height);
}
if (hwdef->sx_base) {
- create_unimplemented_device("SUNW,sx", hwdef->sx_base, 0x2000);
+ create_unimplemented_device("sun-sx", hwdef->sx_base, 0x2000);
}
dev = qdev_new("sysbus-m48t08");
slavio_irq[30], fdc_tc);
if (hwdef->cs_base) {
- sysbus_create_simple("SUNW,CS4231", hwdef->cs_base,
+ sysbus_create_simple("sun-CS4231", hwdef->cs_base,
slavio_irq[5]);
}
if (hwdef->dbri_base) {
/* ISDN chip with attached CS4215 audio codec */
/* prom space */
- create_unimplemented_device("SUNW,DBRI.prom",
+ create_unimplemented_device("sun-DBRI.prom",
hwdef->dbri_base + 0x1000, 0x30);
/* reg space */
- create_unimplemented_device("SUNW,DBRI",
+ create_unimplemented_device("sun-DBRI",
hwdef->dbri_base + 0x10000, 0x100);
}
if (hwdef->bpp_base) {
/* parallel port */
- create_unimplemented_device("SUNW,bpp", hwdef->bpp_base, 0x20);
+ create_unimplemented_device("sun-bpp", hwdef->bpp_base, 0x20);
}
initrd_size = 0;
#define R_INTR 0x50
#define R_MASKED_INTR 0x54
-#define TYPE_ETRAX_FS_TIMER "etraxfs,timer"
+#define TYPE_ETRAX_FS_TIMER "etraxfs-timer"
typedef struct ETRAXTimerState ETRAXTimerState;
DECLARE_INSTANCE_CHECKER(ETRAXTimerState, ETRAX_TIMER,
TYPE_ETRAX_FS_TIMER)
#include "target/arm/idau.h"
#include "qom/object.h"
-#define TYPE_BITBAND "ARM,bitband-memory"
+#define TYPE_BITBAND "ARM-bitband-memory"
OBJECT_DECLARE_SIMPLE_TYPE(BitBandState, BITBAND)
struct BitBandState {
#include "target/arm/cpu.h"
#include "qom/object.h"
-#define TYPE_FSL_IMX25 "fsl,imx25"
+#define TYPE_FSL_IMX25 "fsl-imx25"
OBJECT_DECLARE_SIMPLE_TYPE(FslIMX25State, FSL_IMX25)
#define FSL_IMX25_NUM_UARTS 5
#include "target/arm/cpu.h"
#include "qom/object.h"
-#define TYPE_FSL_IMX31 "fsl,imx31"
+#define TYPE_FSL_IMX31 "fsl-imx31"
OBJECT_DECLARE_SIMPLE_TYPE(FslIMX31State, FSL_IMX31)
#define FSL_IMX31_NUM_UARTS 2
#include "cpu.h"
#include "qom/object.h"
-#define TYPE_FSL_IMX6 "fsl,imx6"
+#define TYPE_FSL_IMX6 "fsl-imx6"
OBJECT_DECLARE_SIMPLE_TYPE(FslIMX6State, FSL_IMX6)
#define FSL_IMX6_NUM_CPUS 4
#include "cpu.h"
#include "qom/object.h"
-#define TYPE_FSL_IMX6UL "fsl,imx6ul"
+#define TYPE_FSL_IMX6UL "fsl-imx6ul"
OBJECT_DECLARE_SIMPLE_TYPE(FslIMX6ULState, FSL_IMX6UL)
enum FslIMX6ULConfiguration {
#include "cpu.h"
#include "qom/object.h"
-#define TYPE_FSL_IMX7 "fsl,imx7"
+#define TYPE_FSL_IMX7 "fsl-imx7"
OBJECT_DECLARE_SIMPLE_TYPE(FslIMX7State, FSL_IMX7)
enum FslIMX7Configuration {
#include "net/can_emu.h"
#include "hw/dma/xlnx_csu_dma.h"
-#define TYPE_XLNX_ZYNQMP "xlnx,zynqmp"
+#define TYPE_XLNX_ZYNQMP "xlnx-zynqmp"
OBJECT_DECLARE_SIMPLE_TYPE(XlnxZynqMPState, XLNX_ZYNQMP)
#define XLNX_ZYNQMP_NUM_APU_CPUS 4
DeviceState *dev;
SysBusDevice *s;
- dev = qdev_new("etraxfs,serial");
+ dev = qdev_new("etraxfs-serial");
s = SYS_BUS_DEVICE(dev);
qdev_prop_set_chr(dev, "chardev", chr);
sysbus_realize_and_unref(s, &error_fatal);
/* D31:F3 SMBus controller */
-#define TYPE_ICH9_SMB_DEVICE "ICH9 SMB"
+#define TYPE_ICH9_SMB_DEVICE "ICH9-SMB"
#define ICH9_A2_SMB_REVISION 0x02
#define ICH9_SMB_PI 0x00
#define GRLIB_AHB_APB_PNP_H
#include "qom/object.h"
-#define TYPE_GRLIB_AHB_PNP "grlib,ahbpnp"
+#define TYPE_GRLIB_AHB_PNP "grlib-ahbpnp"
OBJECT_DECLARE_SIMPLE_TYPE(AHBPnp, GRLIB_AHB_PNP)
-#define TYPE_GRLIB_APB_PNP "grlib,apbpnp"
+#define TYPE_GRLIB_APB_PNP "grlib-apbpnp"
OBJECT_DECLARE_SIMPLE_TYPE(APBPnp, GRLIB_APB_PNP)
void grlib_ahb_pnp_add_entry(AHBPnp *dev, uint32_t address, uint32_t mask,
#define ZYNQ_XADC_NUM_ADC_REGS 128
#define ZYNQ_XADC_FIFO_DEPTH 15
-#define TYPE_ZYNQ_XADC "xlnx,zynq-xadc"
+#define TYPE_ZYNQ_XADC "xlnx-zynq-xadc"
OBJECT_DECLARE_SIMPLE_TYPE(ZynqXADCState, ZYNQ_XADC)
struct ZynqXADCState {
void *opaque;
};
-#define TYPE_REGISTER "qemu,register"
+#define TYPE_REGISTER "qemu-register"
DECLARE_INSTANCE_CHECKER(RegisterInfo, REGISTER,
TYPE_REGISTER)
*/
/* IRQMP */
-#define TYPE_GRLIB_IRQMP "grlib,irqmp"
+#define TYPE_GRLIB_IRQMP "grlib-irqmp"
void grlib_irqmp_ack(DeviceState *dev, int intno);
/* GPTimer */
-#define TYPE_GRLIB_GPTIMER "grlib,gptimer"
+#define TYPE_GRLIB_GPTIMER "grlib-gptimer"
/* APB UART */
-#define TYPE_GRLIB_APB_UART "grlib,apbuart"
+#define TYPE_GRLIB_APB_UART "grlib-apbuart"
#endif /* GRLIB_H */
[VGA_TCX] = {
.opt_name = "tcx",
.name = "TCX framebuffer",
- .class_names = { "SUNW,tcx" },
+ .class_names = { "sun-tcx" },
},
[VGA_CG3] = {
.opt_name = "cg3",
]
}
},
- "SUNW,fdtwo": {
- "Name": "SUNW,fdtwo",
+ "sun-fdtwo": {
+ "Name": "sun-fdtwo",
"version_id": 2,
"minimum_version_id": 2,
"Description": {
]
}
},
- "SUNW,fdtwo": {
- "Name": "SUNW,fdtwo",
+ "sun-fdtwo": {
+ "Name": "sun-fdtwo",
"version_id": 2,
"minimum_version_id": 2,
"Description": {