Don't error out on reading GPCR register, just warn (Thorsten Zitterell).
Don't zero a memory that's already zeroed.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3676
c046a42c-6fe2-441c-8c8c-
71466251a162
if (value & DCSR_NODESCFETCH) {
/* No-descriptor-fetch mode */
- if (value & DCSR_RUN)
+ if (value & DCSR_RUN) {
+ s->chan[channel].state &= ~DCSR_STOPINTR;
pxa2xx_dma_run(s);
+ }
} else {
/* Descriptor-fetch mode */
if (value & DCSR_RUN) {
__FUNCTION__, offset);
return s->gpsr[bank]; /* Return last written value. */
+ case GPCR: /* GPIO Pin-Output Clear registers */
+ printf("%s: Read from a write-only register " REG_FMT "\n",
+ __FUNCTION__, offset);
+ return 31337; /* Specified as unpredictable in the docs. */
+
case GRER: /* GPIO Rising-Edge Detect Enable registers */
return s->rising[bank];
void pxa2xx_mmci_handlers(struct pxa2xx_mmci_s *s, qemu_irq readonly,
qemu_irq coverswitch)
{
- sd_set_cb(s->card, read, coverswitch);
+ sd_set_cb(s->card, readonly, coverswitch);
}
qemu_free(sd->wp_groups);
sd->wp_switch = bdrv_is_read_only(bdrv);
sd->wp_groups = (int *) qemu_mallocz(sizeof(int) * sect);
- memset(sd->wp_groups, 0, sizeof(int) * sect);
memset(sd->function_group, 0, sizeof(int) * 6);
sd->erase_start = 0;
sd->erase_end = 0;